PIC12F675-I/SNG Microchip Technology, PIC12F675-I/SNG Datasheet - Page 24
PIC12F675-I/SNG
Manufacturer Part Number
PIC12F675-I/SNG
Description
IC MCU CMOS 1K FLASH W/AD 8-SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F675-I/SNG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
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PIC12F629/675
3.3
Each GPIO pin is multiplexed with other functions. The
pins and their combined functions are briefly described
here. For specific information about individual functions
such as the comparator or the A/D, refer to the
appropriate section in this Data Sheet.
3.3.1
Figure 3-1 shows the diagram for this pin. The GP0 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• an analog input to the comparator
3.3.2
Figure 3-1 shows the diagram for this pin. The GP1 pin
is configurable to function as one of the following:
• as a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• an analog input to the comparator
• a voltage reference input for the A/D (PIC12F675
DS41190G-page 24
only)
Pin Descriptions and Diagrams
GP0/AN0/CIN+
GP1/AN1/CIN-/V
REF
FIGURE 3-1:
TRISIO
Data Bus
PORT
PORT
WPU
WPU
IOC
TRISIO
Interrupt-on-Change
WR
WR
WR
WR
IOC
RD
RD
RD
RD
D
D
D
D
To Comparator
To A/D Converter
CK
CK
CK
CK
Q
Q
Q
Q
Q
Q
Q
Q
Input Mode
BLOCK DIAGRAM OF GP0
AND GP1 PINS
Analog
2010 Microchip Technology Inc.
RD PORT
Input Mode
GPPU
Analog
Q
Q
EN
EN
D
D
V
DD
Weak
V
V
DD
SS
I/O pin
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