ATTINY25-20SUR Atmel, ATTINY25-20SUR Datasheet - Page 225
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ATTINY25-20SUR
Manufacturer Part Number
ATTINY25-20SUR
Description
MCU AVR 2KB FLASH 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY25-20MU.pdf
(236 pages)
Specifications of ATTINY25-20SUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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28.5
28.6
2586M–AVR–07/10
Rev. 2586I-09/06
Rev. 2586H-06/06
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35.
36.
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
1.
2.
3.
Updated bit R/W descriptions in:
“TIMSK – Timer/Counter Interrupt Mask Register” on page
“TIFR – Timer/Counter Interrupt Flag Register” on page
“TIMSK – Timer/Counter Interrupt Mask Register” on page
“TIFR – Timer/Counter Interrupt Flag Register” on page
“PLLCSR – PLL Control and Status Register” on page
“TIMSK – Timer/Counter Interrupt Mask Register” on page
“TIFR – Timer/Counter Interrupt Flag Register” on page
“PLLCSR – PLL Control and Status Register” on page 107
“DIDR0 – Digital Input Disable Register 0” on page
Added limitation to
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Updated
Updated
All Characterization data moved to
All Register Descriptions are gathered up in seperate sections in the end of each
chapter.
Updated
Table 20-4 on page
Updated
Updated Note in
Updated
Updated Register Description in
Updated Features in
Updated Code Example in
Slave Operation Example” on page
Updated
Updated
Updated
Updated
Updated
Updated
Added
Table 21-2 on page
“DC Characteristics” on page
Table 21-7 on page
Figure 21-6 on page
Table 21-12 on page
Table 22-1 on page
Table 22-2 on page
Table
Table
Table 22-39 on page
Table
Table 11-3 on page
“Calibrated Internal Oscillator” on page
“System Control and Reset” on page
“Analog Comparator Multiplexed Input” on page
Figure 17-1 on page
“Signature Bytes” on page
“Electrical Characteristics” on page
“Calibrated Internal Oscillator” on page
Table 6.5.1 on page
22-30,
22-33,
22-46,
Table 7-1 on page
“Limitations of debugWIRE” on page
152.
“USI – Universal Serial Interface” on page
Table 22-31
Table 22-34
Table
169.
“SPI Master Operation Example” on page 113
22-47,
81,
171.
182.
182.
32.
176.
127.
176.
197.
“I/O Ports” on page
Table 11-5 on page
and
and
“Electrical Characteristics” on page
Table 22-48
114.
35.
154.
166.
Table
Table
166.
22-32, starting on
22-35, starting on
41.
and
27.
27.
142.
55.
Table
82,
97,
84,
96,
106,
144.
Table 11-6 on page 83
123.
84,
95,
106,
and
22-49.
111.
page
page
193.
194.
166.
and
“SPI
and
225
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