ATTINY45-20SH Atmel, ATTINY45-20SH Datasheet - Page 26
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ATTINY45-20SH
Manufacturer Part Number
ATTINY45-20SH
Description
IC MCU AVR 4KB FLASH 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY45-20SH
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.4
26
Rev. 2586J-12/06
ATtiny25/45/85
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10. Updated Package Description in Sections:
11. Updated Package Drawing:
12. Updated Order Codes for:
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“Errata ATtiny85” on page 23
“ATtiny25” on page 11
“ATtiny45” on page 12
“ATtiny85” on page 13
“S8S1” on page 16
“ATtiny25” on page 11
Updated
Updated description of instruction length in
Updated Flash size in
page
Updated cross-references in sections
“Write”
Updated
Updated
Replaced single clocking system figure with two:
Updated
Updated
Updated
Updated
Updated
Updated
Updated “Bit 0” in
Added footnote to
Updated
Deleted “Bits 7, 2” in
Updated and moved section “Timer/Counter0 Prescaler and Clock Sources”, now
located on
Updated
Updated bit description in
and
Added recommended maximum frequency
page
Updated
Updated
Updated
“PLLCSR – PLL Control and Status Register” on page
15.
129.
, starting on
“Low Power Consumption” on page
“Atomic Byte Programming” on page
“Internal PLL for Fast Peripheral Clock Generation - clkPCK” on page
Table 6-1 on page
“Calibrated Internal Oscillator” on page
Table 6-5 on page
“OSCCAL – Oscillator Calibration Register” on page
“CLKPR – Clock Prescale Register” on page
“Power-down Mode” on page
Table 10-5 on page
“Timer/Counter1 Initialization for Asynchronous Mode” on page
Figure 17-8 on page 133
“Temperature Measurement” on page
Table 17-3 on page
page
68.
“PRR – Power Reduction Register” on page
Table 8-3 on page
page
“MCUCR – MCU Control Register” on page
“In-System Re-programmable Flash Program Memory” on
17.
“PLLCSR – PLL Control and Status Register” on page 97
25,
27.
65.
138.
Table 6-13 on page 30
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49.
36.
“Atomic Byte Programming”
in“Prescaling and Conversion Timing” on
“Architectural Overview”
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17.
137.
27.
Figure 6-2
33.
and
107.
Table 6-6 on page
and
32.
39.
Figure
66.
.
,
“Erase”
6-3.
2586M–AVR–07/10
89.
28.
24.
and