ATTINY45-20MUR Atmel, ATTINY45-20MUR Datasheet - Page 37
![MCU AVR 4KB FLASH 20MHZ 20QFN](/photos/6/87/68751/313-20-qfn_sml.jpg)
ATTINY45-20MUR
Manufacturer Part Number
ATTINY45-20MUR
Description
MCU AVR 4KB FLASH 20MHZ 20QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY45-20MUR
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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7.2.1
7.3
7.4
7.4.1
7.4.2
2586M–AVR–07/10
Power Reduction Register
Minimizing Power Consumption
Limitations
Analog to Digital Converter
Analog Comparator
BOD disable functionality has been implemented in the following devices, only:
Revisions are marked on the device package and can be located as follows:
The Power Reduction Register (PRR), see
vides a method to reduce power consumption by stopping the clock to individual peripherals.
The current state of the peripheral is frozen and the I/O registers can not be read or written.
Resources used by the peripheral when stopping the clock will remain occupied, hence the
peripheral should in most cases be disabled before stopping the clock. Waking up a module,
which is done by clearing the bit in PRR, puts the module in the same state as before shutdown.
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall
power consumption. In all other sleep modes, the clock is already stopped. See
of I/O modules” on page 182
There are several issues to consider when trying to minimize the power consumption in an AVR
controlled system. In general, sleep modes should be used as much as possible, and the sleep
mode should be selected so that as few as possible of the device’s functions are operating. All
functions not needed should be disabled. In particular, the following modules may need special
consideration when trying to achieve the lowest possible power consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. Refer to
for details on ADC operation.
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In the other sleep
modes, the Analog Comparator is automatically disabled. However, if the Analog Comparator is
set up to use the Internal Voltage Reference as input, the Analog Comparator should be dis-
abled in all sleep modes. Otherwise, the Internal Voltage Reference will be enabled,
independent of sleep mode. Refer to
configure the Analog Comparator.
• ATtiny25, revision E, and newer
• ATtiny45, all revisions
• ATtiny85, revision C, and newer
• Bottom side of packages 8P3 and 8S2
• Top side of package 20M1
for examples.
“Analog Comparator” on page 123
“PRR – Power Reduction Register” on page
“Analog to Digital Converter” on page 126
for details on how to
“Supply Current
39, pro-
37
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