PIC16F688-I/STG Microchip Technology, PIC16F688-I/STG Datasheet - Page 464

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PIC16F688-I/STG

Manufacturer Part Number
PIC16F688-I/STG
Description
IC PIC MCU FLASH 4KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F688-I/STG

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-TSSOP
For Use With
XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
25.3
25.3.1
DS31025A-page 25-6
crystal oscillator
Nominal F
TMR1 32 kHz
Internal RC oscillator
F
OSC
Timing Clock Source Selection
LCD Timing
RC
= 14 kHz
256
The LCD module has 3 possible clock source inputs and supports static, 1/2, 1/3, and 1/4 multi-
plexing.
The clock sources for the LCD timing generation are:
• Internal RC oscillator
• Timer1 oscillator
• System clock divided by 256
The first timing source is an internal RC oscillator which runs at a nominal frequency of 14 kHz.
This oscillator provides a lower speed clock which may be used to continue running the LCD
while the processor is in sleep. The RC oscillator will power-down when it is not selected or when
the LCD module is disabled.
The second source is the Timer1 external oscillator. This oscillator provides a lower speed clock
which may be used to continue running the LCD while the processor is in sleep. It is assumed
that the frequency provided on this oscillator will be 32 kHz. To use the Timer1 oscillator as a LCD
module clock source, it is only necessary to set the T1OSCEN (T1CON<3>) bit.
The third source is the system clock divided by 256. This divider ratio is chosen to provide about
32 kHz output when the external oscillator is 8 MHz. The divider is not programmable. Instead
the LCDPS register is used to set the LCD frame clock rate.
The clock sources are selected with bits CS1:CS0 (LCDCON<3:2>). Refer to
details of the register programming.
Figure 25-2:
CS1:CS0
LCD Clock Generation
2
4
LMUX1:LMUX0
Static
1/2
1/3
1/4
used for device low frequency or sleep operation
used for device low frequency or sleep operation
4-bit Programmable
LCDPS<3:0>
Prescaler
data bus
internal
32
1997 Microchip Technology Inc.
LMUX1:LMUX0
Ring Counter
1,2,3,4
Figure 25-1
for

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