PIC16F685-E/SS Microchip Technology, PIC16F685-E/SS Datasheet - Page 125
PIC16F685-E/SS
Manufacturer Part Number
PIC16F685-E/SS
Description
IC PIC MCU FLASH 4KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F690DM-PCTLHS.pdf
(306 pages)
3.PIC16F677-IP.pdf
(2 pages)
4.PIC16F677-IP.pdf
(16 pages)
Specifications of PIC16F685-E/SS
Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
18
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
18
Eeprom Memory Size
256Byte
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163029, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PIN
Connectivity
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F685-E/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- PIC16F690DM-PCTLHS PDF datasheet #2
- PIC16F677-IP PDF datasheet #3
- PIC16F677-IP PDF datasheet #4
- Current page: 125 of 306
- Download datasheet (6Mb)
10.1.4
To read a program memory location, the user must
write the Least and Most Significant address bits to the
EEADR and EEADRH registers, set the EEPGD con-
trol bit of the EECON1 register, and then set control bit
RD. Once the read control bit is set, the program mem-
ory Flash controller will use the second instruction
cycle to read the data. This causes the second instruc-
tion immediately following the “BSF
instruction to be ignored. The data is available in the
very next cycle, in the EEDAT and EEDATH registers;
therefore, it can be read as two bytes in the following
instructions.
EXAMPLE 10-3:
© 2008 Microchip Technology Inc.
;
;
BANKSEL EEADR
MOVF
MOVWF
MOVF
MOVWF
BANKSEL EECON1
BSF
BSF
NOP
BANKSEL EEDAT
MOVF
MOVWF
MOVF
MOVWF
BANKSEL 0x00
NOP
READING THE FLASH PROGRAM
MEMORY (PIC16F685/PIC16F689/
PIC16F690)
MS_PROG_EE_ADDR, W
EEADRH
LS_PROG_EE_ADDR, W
EEADR
EECON1, EEPGD
EECON1, RD
EEDAT, W
LOWPMBYTE
EEDATH, W
HIGHPMBYTE
FLASH PROGRAM READ
PIC16F631/677/685/687/689/690
EECON1,RD”
;
;
;MS Byte of Program Address to read
;
;LS Byte of Program Address to read
;
;Point to PROGRAM memory
;EE Read
;First instruction after BSF EECON1,RD executes normally
;Any instructions here are ignored as program
;memory is read in second cycle after BSF EECON1,RD
;
;W = LS Byte of Program Memory
;
;W = MS Byte of Program EEDAT
;
;Bank 0
EEDAT and EEDATH registers will hold this value until
another read or until it is written to by the user.
Note 1: The two instructions following a program
2: If the WR bit is set when EEPGD = 1, it
memory read are required to be NOPs.
This prevents the user from executing a
two-cycle
instruction after the RD bit is set.
will be immediately reset to ‘0’ and no
operation will take place.
instruction
DS41262E-page 123
on
the
next
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