PIC16F688-E/ST Microchip Technology, PIC16F688-E/ST Datasheet - Page 533
PIC16F688-E/ST
Manufacturer Part Number
PIC16F688-E/ST
Description
IC MCU FLASH 4KX14 14TSSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(204 pages)
3.PIC16F688T-ISL.pdf
(6 pages)
4.PIC16F688T-ISL.pdf
(4 pages)
5.PIC16F688T-ISL.pdf
(688 pages)
6.PIC16F688-EP.pdf
(174 pages)
Specifications of PIC16F688-E/ST
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
14-TSSOP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
12
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
256 B
Height
0.9 mm
Length
5 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
4.4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F688T-ISL PDF datasheet #3
- PIC16F688T-ISL PDF datasheet #4
- PIC16F688T-ISL PDF datasheet #5
- PIC16F688-EP PDF datasheet #6
- Current page: 533 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example 1
Example 2
Example 3
Q1
Decode
Q2
register 'f'
[ label ] ANDWF
0
d
(W).AND. (f)
Z
AND the W register with register 'f'. If 'd' is 0 the result is stored in the W register. If
'd' is 1 the result is stored back in register 'f'
1
1
Before Instruction
After Instruction
Before Instruction
After Instruction
Before Instruction
After Instruction
Read
ANDWF
ANDWF
ANDWF
00
f
Section 29. Instruction Set
127
FSR = 0xC2
W
FSR = 0x02
FSR = 0xC2
W
FSR = 0xC2
W
FSR = 0xC2
Contents of Address (FSR) = 0x5A
W
FSR = 0xC2
Contents of Address (FSR) = 0x15
AND W with f
W
W
FSR, 1
FSR, 0
INDF, 1
0101
Q3
Process
= 0x17
= 0x17
= 0x17
= 0x02
= 0x17
= 0x17
data
destination
f,d
dfff
Q4
destination
Write to
ffff
; 0001 0111
; 1100 0010
;----------
; 0000 0010
; 0001 0111
; 1100 0010
;----------
; 0000 0010
.
(0x17)
(0xC2)
------
(0x02)
(0x17)
(0xC2)
------
(0x02)
DS31029A-page 29-11
29
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