ATMEGA48V-10MMH Atmel, ATMEGA48V-10MMH Datasheet - Page 38
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ATMEGA48V-10MMH
Manufacturer Part Number
ATMEGA48V-10MMH
Description
MCU AVR 4KB FLASH 20MHZ 28QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATAVRTS2080B.pdf
(378 pages)
Specifications of ATMEGA48V-10MMH
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
ATMEGA48x
Core
AVR8
3rd Party Development Tools
EWAVR, EWAVR-BL
Data Bus Width
8 bit
Maximum Clock Frequency
10 MHz
Operating Supply Voltage
1.8 V to 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9. Power Management and Sleep Modes
9.1
9.2
38
Sleep Modes
Idle Mode
ATmega48/88/168
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
Figure 8-1 on page 26
distribution. The figure is helpful in selecting an appropriate sleep mode.
different sleep modes and their wake up sources.
Table 9-1.
Notes:
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle
mode, stopping the CPU but allowing the SPI, USART, Analog Comparator, ADC, 2-wire Serial
Interface, Timer/Counters, Watchdog, and the interrupt system to continue operating. This sleep
mode basically halts clk
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Power-save
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT1 and INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
presents the different clock systems in the ATmega48/88/168, and their
CPU
X
and clk
X
X
FLASH
X
X
X
, while allowing the other clocks to run.
Table 9-2 on page 42
Oscillators
X
X
X
X
X
X
(2)
(2)
(2)
X
X
X
X
X
(3)
(3)
(3)
(3)
for a summary.
X
X
X
X
X
Wake-up Sources
X
X
X
(2)
Table 9-1
X
X
2545S–AVR–07/10
X
X
shows the
X
X
X
X
X
X
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