PIC16LF1936-E/ML Microchip Technology, PIC16LF1936-E/ML Datasheet - Page 112
![IC PIC MCU FLASH 512KX14 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LF1936-E/ML
Manufacturer Part Number
PIC16LF1936-E/ML
Description
IC PIC MCU FLASH 512KX14 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets
1.PIC16LF1933-ISS.pdf
(508 pages)
2.PIC16LF1933-ISS.pdf
(46 pages)
3.PIC16LF1934-IML.pdf
(418 pages)
Specifications of PIC16LF1936-E/ML
Program Memory Type
FLASH
Program Memory Size
14KB (8K x 14)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
EUSART/MI2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
25
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1936-E/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16F193X/LF193X
10.1
The WDT derives its time base from the 31 kHz
LFINTOSC internal oscillator.
10.2
The Watchdog Timer module has four operating modes
controlled by the WDTE<1:0> bits in Configuration
Word 1. See Table 10-1.
10.2.1
When the WDTE bits of Configuration Word 1 are set to
‘11’, the WDT is always on.
WDT protection is active during Sleep.
10.2.2
When the WDTE bits of Configuration Word 1 are set to
‘10’, the WDT is on, except in Sleep.
WDT protection is not active during Sleep.
10.2.3
When the WDTE bits of Configuration Word 1 are set to
‘01’, the WDT is controlled by the SWDTEN bit of the
WDTCON register.
WDT protection is unchanged by Sleep. See
Table 10-1 for more details.
TABLE 10-1:
TABLE 10-2:
DS41364D-page 112
WDT_ON (11)
WDT_NSLEEP (10)
WDT_NSLEEP (10)
WDT_SWDTEN (01)
WDT_SWDTEN (01)
WDT_OFF (00)
WDTE<1:0> = 00
WDTE<1:0> = 01 and SWDTEN = 0
WDTE<1:0> = 10 and enter Sleep
CLRWDT Command
Oscillator Fail Detected
Exit Sleep + System Clock = T1OSC, EXTRC, INTOSC, EXTCLK
Exit Sleep + System Clock = XT, HS, LP
Change INTOSC divider (IRCF bits)
Config bits
WDTE
Independent Clock Source
WDT Operating Modes
WDT IS ALWAYS ON
WDT IS OFF IN SLEEP
WDT CONTROLLED BY SOFTWARE
WDT OPERATING MODES
WDT CLEARING CONDITIONS
SWDTEN
X
X
X
1
0
X
Conditions
Device
Awake
Mode
Sleep
X
X
X
X
Disabled
Disabled
Disabled
Active
Active
Active
Mode
WDT
Preliminary
10.3
The WDTPS bits of the WDTCON register set the
time-out period from 1 ms to 256 seconds. After a
Reset, the default time-out period is 2 seconds.
10.4
The WDT is cleared when any of the following condi-
tions occur:
• Any Reset
• CLRWDT instruction is executed
• Device enters Sleep
• Device wakes up from Sleep
• Oscillator fail event
• WDT is disabled
• Oscillator Start-up TImer (OST) is running
See Table 10-2 for more information.
10.5
When the device enters Sleep, the WDT is cleared. If
the WDT is enabled during Sleep, the WDT resumes
counting.
When the device exits Sleep, the WDT is cleared
again. The WDT remains clear until the OST, if
enabled, completes. See Section 5.0 “Oscillator
Module (With Fail-Safe Clock Monitor)” for more
information on the OST.
When a WDT time-out occurs while the device is in
Sleep, no Reset is generated. Instead, the device wakes
up and resumes operation. The TO and PD bits in the
STATUS register are changed to indicate the event. See
Section 3.0 “Memory Organization” and STATUS
register (Register 3-1) for more information.
Time-Out Period
Clearing the WDT
Operation During Sleep
Cleared until the end of OST
2009 Microchip Technology Inc.
Unaffected
Cleared
WDT
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