PIC16C712-04/P Microchip Technology, PIC16C712-04/P Datasheet - Page 101
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PIC16C712-04/P
Manufacturer Part Number
PIC16C712-04/P
Description
IC MCU OTP 1KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C716-04P.pdf
(106 pages)
2.PIC16C716-04P.pdf
(14 pages)
3.PIC16C712-04P.pdf
(109 pages)
Specifications of PIC16C712-04/P
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
4MHz
Number Of I /o
13
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
128Byte
Cpu Speed
4MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16C712-04/P
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PORTC
Postscaler, Timer2
Postscaler, WDT ................................................................ 29
Power-down Mode. See Sleep
Power-on Reset (POR) .............................. 51, 54, 55, 58, 59
Prescaler, Capture ............................................................. 40
Prescaler, Timer0............................................................... 29
Prescaler, Timer1............................................................... 32
Prescaler, Timer2............................................................... 42
Product Identification System .......................................... 103
Program Counter
Program Memory ................................................................. 9
Program Verification .......................................................... 65
Programming, Device Instructions ..................................... 67
PWM (CCP Module) .......................................................... 42
Q
Q-Clock .............................................................................. 42
R
RAM. See Data Memory
Reader Response ............................................................ 104
Register File ....................................................................... 10
Register File Map ............................................................... 10
Reset ............................................................................ 51, 54
© 2005 Microchip Technology Inc.
TRISC Register.......................................................... 12
Select (TOUTPS3:TOUTPS0 Bits) ............................ 36
Assignment (PSA Bit) .......................................... 14, 29
Block Diagram............................................................ 30
Rate Select (PS2:PS0 Bits) ................................. 14, 29
Switching Between Timer0 and WDT ........................ 30
Oscillator Start-up Timer (OST) ........................... 51, 55
POR Status (POR Bit)................................................ 18
Power Control (PCON) Register ................................ 58
Power-down (PD Bit) ........................................... 13, 54
Power-on Reset Circuit, External............................... 55
Power-up Timer (PWRT) ..................................... 51, 55
PWRT Enable (PWRTE Bit)....................................... 52
Time-out (TO Bit) ................................................. 13, 54
Time-out Sequence.................................................... 57
Time-out Sequence on Power-up .............................. 60
Timing Diagram.......................................................... 83
Assignment (PSA Bit) .......................................... 14, 29
Block Diagram............................................................ 30
Rate Select (PS2:PS0 Bits) ................................. 14, 29
Switching Between Timer0 and WDT ........................ 30
Select (T1CKPS1:T1CKPS0 Bits).............................. 31
Select (T2CKPS1:T2CKPS0 Bits).............................. 36
PCL Register........................................................ 11, 19
PCLATH Register .......................................... 11, 19, 62
Reset Conditions........................................................ 58
Interrupt Vector ............................................................ 9
Paging.................................................................... 9, 19
Program Memory Map ................................................. 9
Reset Vector ................................................................ 9
Block Diagram............................................................ 42
CCPR1H:CCPR1L Registers..................................... 42
Duty Cycle.................................................................. 42
Example Frequencies/Resolutions ............................ 43
Output Diagram.......................................................... 42
Period......................................................................... 42
Set-Up for PWM Operation ........................................ 43
TMR2 to PR2 Match ............................................ 36, 42
TMR2 to PR2 Match Enable (TMR2IE Bit) ................ 16
TMR2 to PR2 Match Flag (TMR2IF Bit) ..................... 17
Block Diagram............................................................ 56
Revision History ................................................................. 95
S
Sleep ................................................................................. 64
Sleep ........................................................................... 51, 54
Software Simulator (MPLAB SIM) ..................................... 70
Special Event Trigger. See Compare
Special Features of the CPU ............................................. 51
Special Function Registers ................................................ 11
Speed, Operating ................................................................ 1
Stack.................................................................................. 19
STATUS Register .................................................. 11, 13, 62
T
T1CON Register .......................................................... 11, 31
T2CON Register .......................................................... 11, 36
Timer0 ............................................................................... 29
Timer1 ............................................................................... 31
Brown-out Reset (BOR). See Brown-out Reset (BOR)
MCLR Reset. See MCLR
Power-on Reset (POR). See Power-on Reset (POR)
Reset Conditions for All Registers............................. 59
Reset Conditions for PCON Register ........................ 58
Reset Conditions for Program Counter ..................... 58
Reset Conditions for STATUS Register .................... 58
Timing Diagram ......................................................... 83
WDT Reset. See Watchdog Timer (WDT)
C Bit ........................................................................... 13
DC Bit ........................................................................ 13
IRP Bit ....................................................................... 13
PD Bit .................................................................. 13, 54
RP1:RP0 Bits............................................................. 13
TO Bit .................................................................. 13, 54
Z Bit ........................................................................... 13
T1CKPS1:T1CKPS0 Bits........................................... 31
T1OSCEN Bit ............................................................ 31
T1SYNC Bit ............................................................... 31
TMR1CS Bit............................................................... 31
TMR1ON Bit .............................................................. 31
T2CKPS1:T2CKPS0 Bits........................................... 36
TMR2ON Bit .............................................................. 36
TOUTPS3:TOUTPS0 Bits ......................................... 36
Block Diagram ........................................................... 29
Clock Source Edge Select (T0SE Bit) ................. 14, 29
Clock Source Select (T0CS Bit) .......................... 14, 29
Overflow Enable (T0IE Bit) ........................................ 15
Overflow Flag (T0IF Bit) ...................................... 15, 62
Overflow Interrupt ................................................ 30, 62
Prescaler. See Prescaler, Timer0
Timing Diagram ......................................................... 84
TMR0 Register .......................................................... 11
Block Diagram ........................................................... 32
Capacitor Selection ................................................... 34
Clock Source Select (TMR1CS Bit)........................... 31
External Clock Input Sync (T1SYNC Bit) ................... 31
Module On/Off (TMR1ON Bit) ................................... 31
Oscillator.............................................................. 31, 34
Oscillator Enable (T1OSCEN Bit) .............................. 31
Overflow Enable (TMR1IE Bit) .................................. 16
Overflow Flag (TMR1IF Bit) ....................................... 17
Overflow Interrupt ................................................ 31, 34
Prescaler. See Prescaler, Timer1
Special Event Trigger (CCP) ............................... 34, 41
T1CON Register .................................................. 11, 31
Timing Diagram ......................................................... 84
TMR1H Register.................................................. 11, 31
PIC16C712/716
DS41106B-page 99