PIC16LF1827-I/SO Microchip Technology, PIC16LF1827-I/SO Datasheet - Page 280
PIC16LF1827-I/SO
Manufacturer Part Number
PIC16LF1827-I/SO
Description
IC MCU 8BIT 4KB FLASH 18SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-I/SO
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
PIC16LF1827-I/SO
Manufacturer:
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PIC16F/LF1826/27
24.7
The MSSPx module has a Baud Rate Generator avail-
able for clock generation in both I
modes. The Baud Rate Generator (BRG) reload value
is placed in the SSPxADD register (Register 24-6).
When a write occurs to SSPxBUF, the Baud Rate Gen-
erator will automatically begin counting down.
Once the given operation is complete, the internal clock
will automatically stop counting and the clock pin will
remain in its last state.
An internal signal “Reload” in Figure 24-39 triggers the
value from SSPxADD to be loaded into the BRG
counter. This occurs twice for each oscillation of the
FIGURE 24-40:
TABLE 24-4:
DS41391B-page 280
Note 1:
Note: Values of 0x00, 0x01 and 0x02 are not valid
2:
BAUD RATE GENERATOR
for SSPxADD when used as a Baud Rate
Generator for I
limitation.
32 MHz
32 MHz
32 MHz
16 MHz
16 MHz
16 MHz
4 MHz
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
SPI mode only.
F
OSC
2
C interface does not conform to the 400 kHz I
MSSPX CLOCK RATE W/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
2
C. This is an implementation
SSPxM<3:0>
SCLx
2
C and SPI Master
8 MHz
8 MHz
8 MHz
4 MHz
4 MHz
4 MHz
1 MHz
SSPxM<3:0>
F
CY
Control
Reload
SSPxCLK
Preliminary
Reload
2
module clock line. The logic dictating when the reload
signal is asserted depends on the mode the MSSPx is
being operated in.
Table 24-4 demonstrates clock rates based on
instruction cycles and the BRG value loaded into
SSPxADD.
EQUATION 24-1:
C specification (which applies to rates greater than
BRG Down Counter
SSPxADD<7:0>
BRG Value
0Ch
13h
19h
4Fh
09h
27h
09h
F
CLOCK
=
-------------------------------------------------
(
© 2009 Microchip Technology Inc.
SSPxADD
F
OSC
(2 Rollovers of BRG)
/2
F
OSC
400 kHz
400 kHz
308 kHz
100 kHz
308 kHz
100 kHz
100 kHz
F
+
CLOCK
1
) 4 ( )
(1)
(1)
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