PIC16LF1827-I/SO Microchip Technology, PIC16LF1827-I/SO Datasheet - Page 234
![IC MCU 8BIT 4KB FLASH 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16LF1827-I/SO
Manufacturer Part Number
PIC16LF1827-I/SO
Description
IC MCU 8BIT 4KB FLASH 18SOIC
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Specifications of PIC16LF1827-I/SO
Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
18-SOIC (7.5mm Width)
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Quantity
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Part Number:
PIC16LF1827-I/SO
Manufacturer:
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PIC16F/LF1826/27
The I
features:
• Master mode
• Slave mode
• Byte NACKing (Slave mode)
• Limited Multi-master support
• 7-bit and 10-bit addressing
• Start and Stop interrupts
• Interrupt masking
• Clock stretching
• Bus collision detection
• General call address matching
• Address masking
• Address Hold and Data Hold modes
• Selectable SDAx hold times
Figure 24-2 is a block diagram of the I
ule in Master mode. Figure 24-3 is a diagram of the I
interface module in Slave mode.
FIGURE 24-2:
DS41391C-page 234
2
C interface supports the following modes and
SDAx
SCLx
MSSPX BLOCK DIAGRAM (I
SDAx in
SCLx in
Bus Collision
2
C interface mod-
Read
MSb
Generate (SSPxCON2)
Address Match detect
Preliminary
Write collision detect
2
end of XMIT/RCV
Start bit, Stop bit,
State counter for
Clock arbitration
C
Start bit detect,
Stop bit detect
Acknowledge
SSPxBUF
SSPxSR
2
C™ MASTER MODE)
The PIC16F1827 has two MSSP modules, MSSP1 and
MSSP2, each module operating independently from
the other.
LSb
Note 1: In devices with more than one MSSP
Write
Clock
Shift
data bus
Internal
2: Throughout this section, generic refer-
Set/Reset: S, P, SSPxSTAT, WCOL, SSPxOV
Reset SEN, PEN (SSPxCON2)
Set SSPxIF, BCLxIF
module, it is very important to pay close
attention to SSPxCONx register names.
SSP1CON1 and SSP1CON2 registers
control different operational aspects of the
same module, while SSP1CON1 and
SSP2CON1 control the same features for
two different modules.
ences to an MSSP module in any of its
operating modes may be interpreted as
being equally applicable to MSSP1 or
MSSP2. Register names, module I/O sig-
nals, and bit names may use the generic
designator ‘x’ to indicate the use of a
numeral to distinguish a particular module
when required.
2010 Microchip Technology Inc.
[SSPxM 3:0]
Baud rate
generator
(SSPxADD)
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