PIC16LF1827-I/SS Microchip Technology, PIC16LF1827-I/SS Datasheet - Page 278

IC MCU 8BIT 4KB FLASH 20SSOP

PIC16LF1827-I/SS

Manufacturer Part Number
PIC16LF1827-I/SS
Description
IC MCU 8BIT 4KB FLASH 20SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheets

Specifications of PIC16LF1827-I/SS

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
20-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
15
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF1827-I/SS
Manufacturer:
ATMEL
Quantity:
340
Part Number:
PIC16LF1827-I/SS
Manufacturer:
MIC
Quantity:
20 000
PIC16F/LF1826/27
24.6.13.3
Bus collision occurs during a Stop condition if:
a)
b)
FIGURE 24-38:
FIGURE 24-39:
DS41391C-page 278
After the SDAx pin has been deasserted and
allowed to float high, SDAx is sampled low after
the BRG has timed out.
After the SCLx pin is deasserted, SCLx is
sampled low before SDAx goes high.
SDAx
SCLx
PEN
BCLxIF
P
SSPxIF
SDAx
SCLx
PEN
BCLxIF
P
SSPxIF
Bus Collision During a Stop
Condition
BUS COLLISION DURING A STOP CONDITION (CASE 1)
BUS COLLISION DURING A STOP CONDITION (CASE 2)
SDAx asserted low
Assert SDAx
T
BRG
T
BRG
Preliminary
T
BRG
T
BRG
The Stop condition begins with SDAx asserted low.
When SDAx is sampled low, the SCLx pin is allowed to
float. When the pin is sampled high (clock arbitration),
the Baud Rate Generator is loaded with SSPxADD and
counts down to 0. After the BRG times out, SDAx is
sampled. If SDAx is sampled low, a bus collision has
occurred. This is due to another master attempting to
drive a data ‘0’ (Figure 24-37). If the SCLx pin is
sampled low before SDAx is allowed to float high, a bus
collision occurs. This is another case of another master
attempting to drive a data ‘0’ (Figure 24-38).
SCLx goes low before SDAx goes high,
set BCLxIF
T
BRG
T
BRG
 2010 Microchip Technology Inc.
SDAx sampled
low after T
set BCLxIF
’0’
’0’
’0’
’0’
BRG
,

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