PIC12C672T-04/SM Microchip Technology, PIC12C672T-04/SM Datasheet - Page 34
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PIC12C672T-04/SM
Manufacturer Part Number
PIC12C672T-04/SM
Description
IC MCU OTP 2KX14 A/D 8-SOIJ
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672T-04/SM
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
For Use With
XLT08SO-1 - SOCKET TRANSITION 8SOIC 150/208AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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PIC12C67X
6.1.5
The EEPROM, when addressed, will generate an
acknowledge after the reception of each byte. The pro-
cessor must generate an extra clock pulse which is
associated with this acknowledge bit.
FIGURE 6-1:
FIGURE 6-2:
DS30561B-page 34
Note:
Data Bus
Data Bus
ACKNOWLEDGE
Acknowledge bits are not generated if an
internal programming cycle is in progress.
BLOCK DIAGRAM OF GPIO6 (SDA LINE)
BLOCK DIAGRAM OF GPIO7 (SCL LINE)
Read
GPIO
Read
GPIO
Write
GPIO
Write
GPIO
Output Latch
Output Latch
Input Latch
D
Q
D
Q
CK
CK
Reset
EN
EN
EN
EN
CK
CK
D
Q
D
Q
ltchpin
ltchpin
Schmitt Trigger
Schmitt Trigger
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. The processor must signal an end of data to
the EEPROM by not generating an acknowledge bit on
the last byte that has been clocked out of the EEPROM.
In this case, the EEPROM must leave the data line
HIGH to enable the processor to generate the STOP
condition (Figure 6-4).
P
V
V
DD
P
N
DD
1999 Microchip Technology Inc.
To EEPROM SDA
Pad
To EEPROM SCL
Pad
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