PIC16C712-20/SO Microchip Technology, PIC16C712-20/SO Datasheet

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... CMOS Microcontrollers with A/D Converter and Capture/Compare/PWM Devices included in this Data Sheet: • PIC16C712 • PIC16C716 Microcontroller Core Features: • High-performance RISC CPU • Only 35 single word instructions to learn • All single cycle instructions except for program branches which are two cycle • ...

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... In-Circuit Serial Yes Features Programming Brown-out Reset Yes Packages 18-pin DIP, SOIC; 20-pin SSOP DS41106A-page 2 PIC16C712 MHz POR, BOR (PWRT, OST) 1K 128 7 Ports A input channels PIC16C71 PIC16C711 PIC16C712 PIC16C715 128 TMR0 TMR0 TMR0 TMR0 TMR1 TMR2 — — 1 — — — ...

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... Migration from Base-line to Mid-Range Devices .......................................................................................................... 99 Index ........................................................................................................................................................................... 101 On-Line Support.......................................................................................................................................................... 105 Reader Response ....................................................................................................................................................... 106 PIC16C712/716 Product Identification System ........................................................................................................... 107 Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. ...

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... PIC16C712/716 NOTES: DS41106A-page 4 Preliminary 1999 Microchip Technology Inc. ...

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... Microchip Technology Inc. ommended reading for a better understanding of the device architecture and operation of the peripheral modules. There are two devices (PIC16C712, PIC16C716) cov- ered by this datasheet. Figure 1-1 is the block diagram for both devices. The pinouts are listed in Table 1-1. ...

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... PIC16C712/716 TABLE 1-1 PIC16C712/716 PINOUT DESCRIPTION Pin PIC16C712/716 Name DIP, SOIC SSOP MCLR MCLR V PP OSC1/CLKIN 16 OSC1 CLKIN OSC2/CLKOUT 15 OSC2 CLKOUT RA0/AN0 17 RA0 AN0 RA1/AN1 18 RA1 AN1 RA2/AN2 1 RA2 AN2 RA3/AN3/V 2 REF RA3 AN3 V REF RA4/T0CKI 3 RA4 T0CKI Legend: TTL = TTL-compatible input ...

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... TABLE 1-1 PIC16C712/716 PINOUT DESCRIPTION (Cont.’d) Pin PIC16C712/716 Name DIP, SOIC SSOP RB0/INT 6 RB0 INT RB1/T1OSO/T1CKI 7 RB1 T1OSO T1CKI RB2/T1OSI 8 RB2 T1OSI RB3/CCP1 9 RB3 CCP1 RB4 10 RB5 11 RB6 12 RB7 15 Legend: TTL = TTL-compatible input ST = Schmitt Trigger input with CMOS levels OD = Open drain output SM = SMBus compatible input ...

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... PIC16C712/716 NOTES: DS41106A-page 8 Preliminary 1999 Microchip Technology Inc. ...

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... Program Memory Organization The PIC16C712/716 has a 13-bit program counter capable of addressing program memory space. PIC16C712 has words of program memory and PIC16C716 has words of program memory. Accessing a location above the physically implemented address will cause a wraparound. The reset vector is at 0000h and the interrupt vector is at 0004h ...

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... PIC16C712/716 2.2 Data Memory Organization The data memory is partitioned into multiple banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1 and RP0 are the bank select bits. RP0 (STATUS<6:5>) (1) RP1 = 00 Bank0 = 01 Bank1 = 10 Bank2 (not implemented Bank3 (not implemented) Note 1: Maintain this bit clear to ensure upward compati- bility with future products ...

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... This is the value that will be in the port output latch. 7: Reserved bits; Do Not Use. 1999 Microchip Technology Inc. PIC16C712/716 The special function registers can be classified into two sets; core (CPU) and peripheral. Those registers asso- ciated with the core functions are described in detail in this section ...

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... PIC16C712/716 TABLE 2-1 SPECIAL FUNCTION REGISTER SUMMARY (Cont.’d) Addr Name Bit 7 Bit 6 Bank 1 (1) 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) OPTION_ 81h RBPU INTEDG REG (1) 82h PCL Program Counter’s (PC) Least Significant Byte ...

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... For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1999 Microchip Technology Inc. PIC16C712/716 It is recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register because these instructions do not affect the bits from the STATUS register ...

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... PIC16C712/716 2.2.2.2 OPTION_REG REGISTER The OPTION_REG register is a readable and writable register, which contains various control bits to configure the TMR0 prescaler/WDT postscaler (single assign- able register known also as the prescaler), the External INT Interrupt, TMR0 and the weak pull-ups on PORTB. FIGURE 2-5: ...

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... RBIF: RB Port Change Interrupt Flag bit least one of the RB7:RB4 pins changed state (must be cleared in software None of the RB7:RB4 pins have changed state 1999 Microchip Technology Inc. PIC16C712/716 Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...

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... PIC16C712/716 2.2.2.4 PIE1 REGISTER This register contains the individual enable bits for the peripheral interrupts. FIGURE 2-7: PIE1 REGISTER (ADDRESS 8Ch) U-0 R/W-0 U-0 U-0 ADIE — — — bit7 bit 7: Unimplemented: Read as ‘0’ bit 6: ADIE: A/D Converter Interrupt Enable bit ...

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... TMR1IF: TMR1 Overflow Interrupt Flag bit 1 = TMR1 register overflowed (must be cleared in software TMR1 register did not overflow 1999 Microchip Technology Inc. PIC16C712/716 Note: Interrupt flag bits get set when an interrupt condition occurs, regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...

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... PIC16C712/716 2.2.2.6 PCON REGISTER The Power Control (PCON) register contains a flag bit to allow differentiation between a Power-on Reset (POR external MCLR Reset or WDT Reset. These devices contain an additional bit to differentiate a Brown-out Reset condition from a Power-on Reset condition. FIGURE 2-9: PCON REGISTER (ADDRESS 8Eh) ...

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... The tenth push overwrites the second push (and so on). 1999 Microchip Technology Inc. PIC16C712/716 2.4 Program Memory Paging The CALL and GOTO instructions provide 11 bits of address to allow branching within any 2K program memory page ...

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... Example 2-2. EXAMPLE 2-2: movlw movwf NEXT clrf incf btfss goto CONTINUE : An effective 9-bit address is obtained by concatenating the 8-bit FSR register and the IRP bit (STATUS<7>), as shown in Figure 2-10. However, IRP is not used in the PIC16C712/716. 0 IRP (2) bank select 80h 100h 180h (3) (3) ...

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... Analog input TRIS Latch mode RD TRIS Preliminary PIC16C712/716 input. The operation of each pin is REF INITIALIZING PORTA ; ; Initialize PORTA by ; clearing output ; data latches ; Select Bank 1 ; Value used to ; initialize data ; direction ; Set RA<3:0> as inputs ; RA<4> as outputs ; Return to Bank 0 I/O pin TTL Input Buffer ...

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... PIC16C712/716 FIGURE 3-2: BLOCK DIAGRAM OF RA4/T0CKI PIN DATA BUS WR PORT WR TRIS RD PORT TMR0 Clock Input TABLE 3-1 PORTA FUNCTIONS Name Bit# Buffer RA0/AN0 bit0 TTL RA1/AN1 bit1 TTL RA2/AN2 bit2 TTL RA3/AN3/V bit3 TTL REF RA4/T0CKI bit4 ST Legend: TTL = TTL input Schmitt Trigger input ...

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... Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). 1999 Microchip Technology Inc. PIC16C712/716 Each of the PORTB pins has a weak internal pull-up. A single control bit can turn on all the pull-ups. This is per- formed by clearing bit RBPU (OPTION_REG<7>). The weak pull-up is automatically turned off when the port pin is configured as an output ...

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... PIC16C712/716 PORTB pins RB3:RB1 are multiplexed with several peripheral functions (Table 3-3). PORTB pins RB3:RB0 have Schmitt Trigger input buffers. When enabling peripheral functions, care should be taken in defining TRIS bits for each PORTB pin. Some peripherals override the TRIS bit to make a pin an out- put, while other peripherals override the TRIS bit to make a pin an input ...

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... DATACCP TRISCCP<2> TRISCCP CCP Output Mode PORTB<3> PORTB TRISB<3> TRISB CCPON RD PORTB 1999 Microchip Technology Inc. PIC16C712/716 V DD weak P V pull- TTL Buffer (1) RBPU CCPON weak P pull- Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) TTL Buffer and clear the RBPU bit (OPTION_REG<7>). ...

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... PIC16C712/716 FIGURE 3-7: BLOCK DIAGRAM OF RB7:RB4 PINS (1) RBPU DATA BUS WR PORT WR TRIS Set RBIF From other RB7:RB4 pins RB7:RB6 in serial programming mode Note 1: To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION_REG<7>). TABLE 3-3 PORTB FUNCTIONS ...

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... PORTB RB7 RB6 86h TRISB PORTB Data Direction Register 81h OPTION_REG RBPU INTEDG Legend unknown unchanged. Shaded cells are not used by PORTB. 1999 Microchip Technology Inc. PIC16C712/716 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RB5 RB4 RB3 RB2 RB1 RB0 T0CS ...

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... PIC16C712/716 NOTES: DS41106A-page 28 Preliminary 1999 Microchip Technology Inc. ...

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... T0SE (1) T0CS Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). 1999 Microchip Technology Inc. PIC16C712/716 Additional information on external clock requirements is available in the PICmicro™ Mid-Range Reference Manual, (DS33023). 4.2 Prescaler ...

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... PIC16C712/716 4.2.1 SWITCHING PRESCALER ASSIGNMENT The prescaler assignment is fully under software con- trol, i.e., it can be changed “on the fly” during program execution. Note: To avoid an unintended device RESET, a specific instruction sequence (shown in the PICmicro™ Mid-Range Reference Manual, DS33023) must be executed when changing the prescaler assignment from Timer0 to the WDT ...

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... Internal clock (F /4) OSC bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 1999 Microchip Technology Inc. PIC16C712/716 5.1 Timer1 Operation Timer1 can operate in one of these modes: • timer • synchronous counter • asynchronous counter The operating mode is determined by the clock select bit, TMR1CS (T1CON< ...

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... PIC16C712/716 FIGURE 5-2: TIMER1 BLOCK DIAGRAM Set flag bit TMR1IF on Overflow TMR1 TMR1H T1OSC RB1/T1OSO/T1CKI RB2/T1OSI Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. 5.2 Timer1 Module and PORTB Operation When Timer1 is configured as timer running from the main oscillator, PORTB< ...

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... External circuit T1CON = --xx 0x11 TR1SCCP = ---- -x-1 Firmware T1CON = --xx 0x11 TR1SCCP = ---- -x-0 Counter Timer1 oscillator T1CON = --xx 1x11 1999 Microchip Technology Inc. PIC16C712/716 TMR1 Module Operation Off PORTB<2:1> function as normal I/O TMR1 module uses the main PORTB<2:1> function as normal oscillator as clock source. I/O TMR1ON can turn on or turn off Timer1 ...

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... PIC16C712/716 5.3 Timer1 Oscillator A crystal oscillator circuit is built in between pins T1OSI (input) and T1OSO (amplifier output enabled by setting control bit T1OSCEN (T1CON<3>). The oscilla- tor is a low power oscillator rated up to 200 kHz. It will continue to run during SLEEP primarily intended for a 32 kHz crystal. Table 5-2 shows the capacitor selection for the Timer1 oscillator ...

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... NOTES: 1999 Microchip Technology Inc. PIC16C712/716 Preliminary DS41106A-page 35 ...

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... PIC16C712/716 6.0 TIMER2 MODULE The Timer2 module timer has the following features: • 8-bit timer (TMR2 register) • 8-bit period register (PR2) • Readable and writable (Both registers) • Software programmable prescaler (1:1, 1:4, 1:16) • Software programmable postscaler (1:1 to 1:16) • ...

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... Timer2 Period Register Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by the Timer2 module. 1999 Microchip Technology Inc. PIC16C712/716 6.2 Timer2 Interrupt The Timer2 module has an 8-bit period register PR2. Timer2 increments from 00h until it matches PR2 and then resets to 00h on the next increment cycle ...

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... PIC16C712/716 NOTES: DS41106A-page 38 Preliminary 1999 Microchip Technology Inc. ...

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... Reserved bit; Do Not Use bit 0: TT1CK - Tri state control bit for T1CKI pin 0 = T1CKI pin is an output 1 = T1CKI pin is an input 1999 Microchip Technology Inc. PIC16C712/716 Additional information on the CCP module is available in the PICmicro™ Mid-Range Reference Manual, (DS33023). TABLE 7-1 CCP Mode ...

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... PIC16C712/716 7.1 Capture Mode In Capture mode, CCPR1H:CCPR1L captures the 16-bit value of the TMR1 register when an event occurs on pin RB3/CCP1. An event is defined as: • every falling edge • every rising edge • every 4th rising edge • every 16th rising edge An event is selected by control bits CCP1M3:CCP1M0 (CCP1CON< ...

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... TMR2IF DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 — — — TCCP — — — CCP1IE TMR2IE Preliminary PIC16C712/716 Value on Value on Bit 0 POR, all other BOR resets — TT1CK xxxx xxxx xxxx xuxu RBIF 0000 000x 0000 000u TMR1IF -0-- -000 -0-- -000 ...

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... PIC16C712/716 7.3 PWM Mode In Pulse Width Modulation (PWM) mode, the CCP1 pin produces 10-bit resolution PWM output. Since the CCP1 pin is multiplexed with the PORTB data latch, the TRISCCP<2> bit must be cleared to make the CCP1 pin an output. Note: Clearing the CCP1CON register will force the CCP1 PWM output latch to the default low level ...

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... ADIE 92h PR2 Timer2 module’s period register Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. 1999 Microchip Technology Inc. PIC16C712/716 1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz 0xFF 0xFF ...

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... PIC16C712/716 7.4 CCP1 Module and PORTB Operation When the CCP module is disabled, PORTB<3> oper- ates as a normal I/O pin. When the CCP module is enabled, PORTB<3> operation is affected. Multiplex- ing details of the CCP1 module are shown on PORTB<3>, refer to Figure 3.6. Table 7-5 below shows the effects of the CCP module operation on PORTB< ...

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... Unimplemented: Read as '0' bit 0: ADON: A/D On bit 1 = A/D converter module is operating 0 = A/D converter module is shutoff and consumes no operating current 1999 Microchip Technology Inc. PIC16C712/716 Additional information on the A/D module is available in the PICmicro™ (DS33023). The A/D module has three registers. These registers are: • ...

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... PIC16C712/716 FIGURE 8-2: ADCON1 REGISTER (ADDRESS 9Fh) U-0 U-0 U-0 U-0 — — — — bit7 bit 7-3: Unimplemented: Read as '0' bit 2-0: PCFG2:PCFG0: A/D Port Configuration Control bits PCFG2:PCFG0 RA0 A 0x0 A 0x1 A 100 A 101 D 11x A = Analog input D = Digital I/O DS41106A-page 46 ...

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... A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1999 Microchip Technology Inc. PIC16C712/716 1. Configure the A/D module: • Configure analog pins/voltage reference/ and digital I/O (ADCON1) • Select A/D input channel (ADCON0) • Select A/D conversion clock (ADCON0) • Turn on A/D module (ADCON0) 2 ...

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... PIC16C712/716 8.1 A/D Acquisition Requirements For the A/D converter to meet its specified accuracy, the charge holding capacitor (C ) must be allowed HOLD to fully charge to the input channel voltage level. The analog input model is shown in Figure 8-4. The source impedance (R ) and the internal sampling switch (R ...

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... When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. 1999 Microchip Technology Inc. PIC16C712/716 8.3 Configuring Analog Port Pins . The The ADCON1 and TRISA registers control the opera- AD tion of the A/D port pins ...

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... PIC16C712/716 8.4 A/D Conversions Note: The GO/DONE bit should NOT be set in the same instruction that turns on the A/D. 8.5 Use of the CCP Trigger An A/D conversion can be started by the “special event trigger” of the CCP1 module. This requires that the CCP1M3:CCP1M0 bits (CCP1CON<3:0>) be pro- grammed as 1011 and that the A/D module is enabled (ADON bit is set) ...

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... SPECIAL FEATURES OF THE CPU The PIC16C712/716 devices have a host of features intended to maximize system reliability, minimize cost through elimination of external components, provide power saving operating modes and offer code protec- tion. These are: • OSC Selection • Reset - Power-on Reset (POR) ...

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... Programming code protection off 10 = 0400h - 07FFh code protected 01 = 0200h - 07FFh code protected 00 = 0000h - 07FFh code protected bit 13-8, 5-4: Code Protection for 1K Program memory (PIC16C712 Programming code protection off 10 = Programming code protection off 01 = 0200h - 03FFh code protected 00 = 0000h - 03FFh code protected bit 7: Unimplemented: Read as ’ ...

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... FIGURE 9-3: EXTERNAL CLOCK INPUT OPERATION (HS OSC CONFIGURATION) OSC1 Clock from ext. system PIC16C7XX Open OSC2 1999 Microchip Technology Inc. PIC16C712/716 TABLE 9-1 Ranges Tested: Mode XT 455 kHz 2.0 MHz 4.0 MHz HS 8.0 MHz 16.0 MHz These values are for design guidance only. See notes at bottom of page ...

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... PIC16C712/716 9.2.3 RC OSCILLATOR For timing insensitive applications, the “RC” device option offers additional cost savings. The RC oscillator frequency is a function of the supply voltage, the resis- tor (R ) and capacitor (C ) values and the operat- EXT EXT ing temperature. In addition to this, the oscillator frequency will vary from unit to unit due to normal pro- cess parameter variation ...

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... The OST time-out is invoked only for XT, LP and HS modes and only on Power-on Reset or wake-up from SLEEP. 9.7 Brown-Out Reset (BOD) The PIC16C712/716 members have on-chip Brown-out Reset circuitry. A configuration bit, BODEN, can disable (if clear/programmed) or enable (if set) the Brown-out Reset circuitry parameter D005(V eter ( Table 12-6 ...

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... PIC16C712/716 FIGURE 9-6: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT External Reset MCLR SLEEP WDT WDT Module Time-out Reset V rise DD detect Power-on Reset V DD Brown-out Reset BODEN OST/PWRT OST 10-bit Ripple counter OSC1 (1) PWRT On-chip 10-bit Ripple counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. ...

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... DD such that 0 Internal brown-out reset should be dis- abled when using this circuit. 3: Resistors should be adjusted for the characteristics of the transistor. 1999 Microchip Technology Inc. PIC16C712/716 FIGURE 9-10: EXTERNAL BROWN-OUT PROTECTION CIRCUIT MCP809 bypass capacitor Vss V DD RST This brown-out protection Microchip Technology’ ...

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... PIC16C712/716 TABLE 9-3 TIME-OUT IN VARIOUS SITUATIONS Oscillator Configuration PWRTE = 0 XT, HS 1024T TABLE 9-4 STATUS BITS AND THEIR SIGNIFICANCE POR BOR TO PD Power-on Reset Illegal set on POR Illegal set on POR Brown-out Reset WDT Reset WDT Wake- MCLR Reset during normal operation MCLR Reset during SLEEP or interrupt wake-up from SLEEP ...

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... TABLE 9-6 INITIALIZATION CONDITIONS FOR ALL REGISTERS OF THE PIC16C712/716 Register Power-on Reset, Brown-out Reset W xxxx xxxx INDF N/A TMR0 xxxx xxxx PCL 0000h STATUS 0001 1xxx FSR xxxx xxxx (4) --0x 0000 PORTA (5) xxxx xxxx PORTB DATACCP ---- -x-x PCLATH ---0 0000 INTCON 0000 -00x ...

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... PIC16C712/716 FIGURE 9-11: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-12: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 9-13: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO V ...

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... Interrupts The PIC16C712/716 devices have sources of interrupt. The interrupt control register (INTCON) records individual interrupt requests in flag bits. It also has individual and global interrupt enable bits. Note: Individual interrupt flag bits are set regard- less of the status of their corresponding mask bit or the GIE bit. ...

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... PIC16C712/716 9.10.1 INT INTERRUPT External interrupt on RB0/INT pin is edge triggered, either rising if bit INTEDG (OPTION_REG<6>) is set, or falling if the INTEDG bit is clear. When a valid edge appears on the RB0/INT pin, flag (INTCON<1>) is set. This interrupt can be disabled by clearing enable bit INTE (INTCON<4>). Flag bit INTF must be cleared in software in the interrupt service rou- tine before re-enabling this interrupt ...

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... Legend: Shaded cells are not used by the Watchdog Timer. Note 1: See Figure 9-1 for operation of these bits. 1999 Microchip Technology Inc. PIC16C712/716 WDT time-out period values may be found in the Elec- trical Specifications section under T #31). Values for the WDT prescaler (actually a postscaler, but shared with the Timer0 prescaler) may be assigned using the OPTION_REG register ...

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... PIC16C712/716 9.13 Power-down Mode (SLEEP) Power-down mode is entered by executing a SLEEP instruction. If enabled, the Watchdog Timer will be cleared but keeps running, the PD bit (STATUS<3>) is cleared, the TO (STATUS<4>) bit is set, and the oscillator driver is turned off. The I/O ports maintain the status they had, before the SLEEP instruction was executed (driving high, low, or hi-impedance) ...

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... It is recom- mended that only the 4 least significant bits of the ID location are used. For ROM devices, these values are submitted along with the ROM code. 1999 Microchip Technology Inc. PIC16C712/716 (2) OST Interrupt Latency ...

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... PIC16C712/716 NOTES: DS41106A-page 66 Preliminary 1999 Microchip Technology Inc. ...

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... NOP. One instruc- tion cycle consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the normal instruction 1999 Microchip Technology Inc. PIC16C712/716 execution time conditional test is true or the program counter is changed as a result of an instruc- tion, the instruction execution time ...

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... PIC16C712/716 TABLE 10-2 PIC16CXXX INSTRUCTION SET Mnemonic, Description Operands BYTE-ORIENTED FILE REGISTER OPERATIONS ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW - Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ f, d Increment f, Skip if 0 ...

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... Both systems will operate across the entire operating speed range of the PICmicro MCU. 1999 Microchip Technology Inc. PIC16C712/716 11.3 ICEPIC: Low-Cost PICmicro In-Circuit Emulator ICEPIC is a low-cost in-circuit emulator solution for the Microchip PIC12CXXX, PIC16C5X and PIC16CXXX families of 8-bit OTP microcontrollers ...

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... PIC16C712/716 11.6 SIMICE Entry-Level Hardware Simulator SIMICE is an entry-level hardware development sys- tem designed to operate in a PC-based environment with Microchip’s simulator MPLAB™-SIM. Both SIM- ICE and MPLAB-SIM run under Microchip Technol- ogy’s MPLAB Integrated Development Environment (IDE) software. Specifically, SIMICE provides hardware simulation for Microchip’ ...

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... MPASM provides a rich directive language to support programming of the PICmicro. Directives are helpful in making the development of your assemble source code shorter and more maintainable. 1999 Microchip Technology Inc. PIC16C712/716 11.12 Software Simulator (MPLAB-SIM) The MPLAB-SIM Software Simulator allows code development host environment. It allows the user to simulate the PICmicro series microcontrollers on an instruction level ...

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... PIC16C712/716 11. Evaluation and EE OQ Programming Tools K L evaluation and programming tools support EE OQ Microchips HCS Secure Data Products. The HCS eval- uation kit includes an LCD display to show changing codes, a decoder to decode transmissions, and a pro- gramming interface to program test transmitters. DS41106A-page 72 Preliminary ...

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... Products Emulator Tools 1999 Microchip Technology Inc. PIC16C712/716 á á á á á á á á á á á á á á á á á á ...

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... PIC16C712/716 NOTES: DS41106A-page 74 Preliminary 1999 Microchip Technology Inc. ...

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... Exposure to maximum rating conditions for extended periods may affect device reliability. 1999 Microchip Technology Inc. (except V , MCLR, and RA4).......................................... -0. > pin, inducing currents greater than 80 mA, may cause latch-up. PP should be used when applying a “low” level to the MCLR Preliminary PIC16C712/716 + 0.3V {( pin rather PP DS41106A-page 75 ...

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... PIC16C712/716 FIGURE 12-1: PIC16C712/716 VOLTAGE-FREQUENCY GRAPH, -40°C < TA < +125°C 6.0 5.5 5.0 4 (Volts) 4.0 3.5 3.0 2.5 2.0 0 Note 1: The shaded region indicates the permissible combinations of voltage and frequency. FIGURE 12-2: PIC16LC712/716 VOLTAGE-FREQUENCY GRAPH, 0°C < TA < +70°C 6.0 5.5 5 ...

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... DC Characteristics: PIC16C712/716-04 (Commercial, Industrial, Extended) PIC16C712/716-20 (Commercial, Industrial, Extended) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D001A D002 RAM Data Retention Voltage D003 V V Start Voltage to ensure inter- POR DD nal Power-on Reset signal D004 Rise Rate to ensure internal VDD DD D004A* ...

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... PIC16C712/716 12.2 DC Characteristics: PIC16LC712/716-04 (Commercial, Industrial) DC CHARACTERISTICS Param Sym Characteristic No. D001 V Supply Voltage DD D002 RAM Data Retention Voltage D003 V V Start Voltage to ensure inter- POR DD nal Power-on Reset signal D004 Rise Rate to ensure internal VDD DD D004A* Power-on Reset signal D005 V Brown-out Reset ...

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... DC Characteristics: PIC16C712/716-04 (Commercial, Industrial, Extended) PIC16C712716-20 (Commercial, Industrial, Extended) PIC16LC712/716-04 (Commercial, Industrial) DC CHARACTERISTICS Param Sym Characteristic No. Input Low Voltage V I/O ports IL D030 with TTL buffer D030A D031 with Schmitt Trigger buffer D032 MCLR, OSC1 (in RC mode) D033 OSC1 (in XT, HS and LP ...

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... PIC16C712/716 DC CHARACTERISTICS Param Sym Characteristic No. Output High Voltage D090 V I/O ports (Note 3) OH D092 OSC2/CLKOUT (RC osc mode) D150* V Open-Drain High Voltage OD Capacitive Loading Specs on Output Pins D100 C OSC2 pin OSC2 D101 C All I/O pins and OSC2 ( mode) * These parameters are characterized but not tested. ...

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... Lowercase letters (pp) and their meanings CCP1 ck CLKOUT SDI do SDO dt Data in io I/O port mc MCLR Uppercase letters and their meanings Fall H High I Invalid (Hi-impedance) L Low 1999 Microchip Technology Inc. PIC16C712/716 T Time osc OSC1 SCK T0CKI t1 T1CKI Period R Rise V Valid Z Hi-impedance Preliminary DS41106A-page 81 ...

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... PIC16C712/716 12.4.2 TIMING CONDITIONS The temperature and voltages specified in Table 12-1 apply to all timing specifications, unless otherwise noted. Figure 12-1 specifies the load conditions for the timing specifications. TABLE 12-1 TEMPERATURE AND VOLTAGE SPECIFICATIONS - AC Standard Operating Conditions (unless otherwise stated) Operating temperature ...

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... All devices are tested to operate at "min." values with an external clock applied to the OSC1/CLKIN pin. When an external clock input is used, the "Max." cycle time limit is "DC" (no clock) for all devices. 1999 Microchip Technology Inc. PIC16C712/716 ...

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... PIC16C712/716 FIGURE 12-3: CLKOUT AND I/O TIMING Q4 OSC1 CLKOUT I/O Pin (input) I/O Pin old value (output) Note: Refer to Figure 12-1 for load conditions. TABLE 12-3 CLKOUT AND I/O TIMING REQUIREMENTS Param Sym Characteristic No. 10* TosH2ckL OSC1 to CLKOUT 11* TosH2ckH OSC1 to CLKOUT ...

Page 85

... Brown-out Reset Pulse Width BOR * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC16C712/716 Min Typ† ...

Page 86

... PIC16C712/716 FIGURE 12-6: TIMER0 AND TIMER1 EXTERNAL CLOCK TIMINGS T0CKI T1OSO/T1CKI TMR0 or TMR1 Note: Refer to Figure 12-1 for load conditions. TABLE 12-5 TIMER0 AND TIMER1 EXTERNAL CLOCK REQUIREMENTS Param Sym Characteristic No. 40* Tt0H T0CKI High Pulse Width 41* Tt0L T0CKI Low Pulse Width ...

Page 87

... TccF CCP1 output fall time * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. 1999 Microchip Technology Inc. PIC16C712/716 Min Typ† Max Units Conditions ...

Page 88

... PIC16C712/716 TABLE 12-7 A/D CONVERTER CHARACTERISTICS: PIC16C712/716-04 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC16C712/716-20 (COMMERCIAL, INDUSTRIAL, EXTENDED) PIC16LC712/716-04 (COMMERCIAL, INDUSTRIAL) Param Sym Characteristic No. A01 N Resolution R A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 E Full scale error FS A06 E Offset error ...

Page 89

... Note 2 20 — 5* — — — § — OSC 1.5 § — — cycle. CY Preliminary PIC16C712/716 1 Tcy 1 0 NEW_DATA DONE Units Conditions s T based, V 3.0V OSC REF s T based, V full range OSC REF s A/D RC Mode s A/D RC Mode ...

Page 90

... PIC16C712/716 NOTES: DS41106A-page 90 Preliminary 1999 Microchip Technology Inc. ...

Page 91

... C. ’Max’ or ’min’ represents (mean + (mean - 3 ) respectively, where Graphs and Tables not available at this time. 1999 Microchip Technology Inc. PIC16C712/716 is standard deviation, over the whole temperature range. Preliminary DD DS41106A-page 91 ...

Page 92

... PIC16C712/716 NOTES: DS41106A-page 92 Preliminary 1999 Microchip Technology Inc. ...

Page 93

... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1999 Microchip Technology Inc. PIC16C712/716 Example PIC16C716-04/P 9917HAT Example Example PIC16C712 -20/SO 9910/SAA Example PIC16C712 -20I/SS025 9917SBP Preliminary 16C716 /JW 9917CAT DS41106A-page 93 ...

Page 94

... PIC16C712/716 Package Type: K04-007 18-Lead Plastic Dual In-line (P) – 300 mil Units Dimension Limits PCB Row Spacing Number of Pins Pitch Lower Lead Width Upper Lead Width Shoulder Radius Lead Thickness Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane Tip to Seating Plane ...

Page 95

... D 0.880 0.900 0.920 E 0.285 0.298 0.310 E1 0.255 0.270 0.285 eB 0.345 0.385 0.425 W1 0.130 0.140 0.150 W2 0.190 0.200 0.210 Preliminary PIC16C712/716 MILLIMETERS MIN NOM MAX 7.62 18 2.49 2.54 2.59 0.41 0.47 0.53 1.27 1.40 1.52 0.25 0.32 0.38 0.20 0.25 0.30 4.45 4 ...

Page 96

... PIC16C712/716 Package Type: K04-051 18-Lead Plastic Small Outline (SO) – Wide, 300 mil ° Units Dimension Limits Pitch p Number of Pins n Overall Pack. Height A Shoulder Height A1 Standoff A2 ‡ Molded Package Length D ‡ Molded Package Width E Outside Dimension E1 Chamfer Distance X Shoulder Radius R1 Gull Wing Radius ...

Page 97

... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” JEDEC equivalent: MO-150 AE 1999 Microchip Technology Inc. PIC16C712/716 ...

Page 98

... NOTES: 1999 Microchip Technology Inc. PIC16C712/716 Preliminary DS41106A-page 98 ...

Page 99

... Reg- isters are reset differently. 10. Wake up from SLEEP through interrupt is added. 1999 Microchip Technology Inc. PIC16C712/716 11. Two separate timers, Oscillator Start-up Timer (OST) and Power-up Timer (PWRT) are included for more reliable power-up. These tim- ers are invoked selectively to avoid unnecessary delays on power-up and wake-up ...

Page 100

... PIC16C712/716 NOTES: DS41106A-page 100 Preliminary 1999 Microchip Technology Inc. ...

Page 101

... Enable (CCP1IE Bit) .................................................. 16 Flag (CCP1IF Bit) ....................................................... 17 Timer Resources ........................................................ 39 Timing Diagram .......................................................... 87 CCP1CON Register ........................................................... 39 CCP1M3:CCP1M0 Bits .............................................. 39 CCP1X:CCP1Y Bits ................................................... 39 1999 Microchip Technology Inc. PIC16C712/716 Code Protection ........................................................... 51, 65 CP1:CP0 Bits ............................................................. 52 Compare (CCP Module) .................................................... 41 Block Diagram ........................................................... 41 CCP Pin Configuration .............................................. 41 CCPR1H:CCPR1L Registers .................................... 41 Software Interrupt ...................................................... 41 Special Event Trigger .................................... 34, 41, 50 Timer1 Mode Selection ...

Page 102

... PIC16C712/716 A/D Converter Enable (ADIE Bit) ............................... 16 CCP1 Enable (CCP1IE Bit) .................................. 16, 40 Global Interrupt Enable (GIE Bit) ......................... 15, 61 Interrupt on Change (RB7:RB4) Enable (RBIE Bit) ................................................. 15, 62 Peripheral Interrupt Enable (PEIE Bit) ....................... 15 RB0/INT Enable (INTE Bit) ........................................ 15 TMR0 Overflow Enable (T0IE Bit) .............................. 15 TMR1 Overflow Enable (TMR1IE Bit) ........................ 16 TMR2 to PR2 Match Enable (TMR2IE Bit) ...

Page 103

... Stack .................................................................................. 19 STATUS Register .................................................. 11, 13 Bit ........................................................................... 13 DC Bit ......................................................................... 13 IRP Bit ........................................................................ 13 PD Bit ................................................................... 13, 54 RP1:RP0 Bits ............................................................. 13 TO Bit ................................................................... 13 Bit ............................................................................ 13 1999 Microchip Technology Inc. PIC16C712/716 T T1CON Register .......................................................... 11, 31 T1CKPS1:T1CKPS0 Bits ........................................... 31 T1OSCEN Bit ............................................................ 31 T1SYNC Bit ............................................................... 31 TMR1CS Bit ............................................................... 31 TMR1ON Bit .............................................................. 31 T2CON Register .......................................................... 11, 36 T2CKPS1:T2CKPS0 Bits ........................................... 36 TMR2ON Bit .............................................................. 36 TOUTPS3:TOUTPS0 Bits ...

Page 104

... PIC16C712/716 Watchdog Timer (WDT) ............................................... 51, 63 Block Diagram ............................................................ 63 Enable (WDTE Bit) ............................................... 52, 63 Programming Considerations .................................... 63 RC Oscillator .............................................................. 63 Time-out Period ......................................................... 63 Timing Diagram .......................................................... 85 WDT Reset, Normal Operation ...................... 54, 58, 59 WDT Reset, SLEEP ....................................... 54, 58, 59 WWW, On-Line Support ....................................................... 3 DS41106A-page 104 Preliminary 1999 Microchip Technology Inc. ...

Page 105

... Conferences for products, Development Sys- tems, technical information and more • Listing of seminars and events 1999 Microchip Technology Inc. PIC16C712/716 Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip’ ...

Page 106

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16C712/716 Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this data sheet easy to follow? If not, why? 4 ...

Page 107

... PIC16C716 - 04/P 301 = Commercial temp., PDIP package, 4 MHz, normal pattern #301. b) PIC16LC712 - 04I/SO = Industrial temp., SOIC package, 200 kHz, Extended V (2) ;V range 4. PIC16C712 - 20I/P = Industrial temp., PDIP (2) ;V range 2.5V to 5.5V DD package, 20MHz, normal V (2) ;V range 4.0V to 5.5V DD (2) ...

Page 108

... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...

Page 109

... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...