PIC12CE519-04/SN Microchip Technology, PIC12CE519-04/SN Datasheet - Page 498
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PIC12CE519-04/SN
Manufacturer Part Number
PIC12CE519-04/SN
Description
IC MCU OTP 1KX12 W/EE 8SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12C508A-04SM.pdf
(113 pages)
3.PIC12C508A-04SM.pdf
(4 pages)
4.PIC12CE518-04SM.pdf
(16 pages)
Specifications of PIC12CE519-04/SN
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.5KB (1K x 12)
Program Memory Type
OTP
Eeprom Size
16 x 8
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-SOIC (3.9mm Width)
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMING309-1046 - ADAPTER 8-SOIC TO 8-DIP309-1045 - ADAPTER 8-SOIC TO 8-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12CE519-04/SN
Manufacturer:
Microchip
Quantity:
360
- PIC16F688T-ISL PDF datasheet
- PIC12C508A-04SM PDF datasheet #2
- PIC12C508A-04SM PDF datasheet #3
- PIC12CE518-04SM PDF datasheet #4
- Current page: 498 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
27.1
DS31027A-page 27-2
Introduction
The device configuration bits allow each user to customize certain aspects of the device to the
needs of the application. When the device powers up, the state of these bits determines the
modes that the device uses. Subsection
uration bits, and the modes that they can be configured to. These bits are mapped in program
memory location 2007h. This location is not accessible during normal device operation (can be
accessed only during programming mode).
The configuration bits can be programmed (read as '0') or left unprogrammed (read as '1') to
select various device configurations. The ability to change these settings once they have been
programmed depends on the memory technology and the package type.
For Read Only Memory (ROM) devices, these bits are specified at time of ROM code submittal
and once the device is masked may not be changed for those devices (would require a new mask
code).
For One Time Programmable (OTP) devices, once these bits are programmed (’0’), they may not
be changed.
For windowed EPROM devices, once these bits are programmed (’0’), the device must be UV
erased to return the configuration word to the erased state. UV erasing the device also erases
the program memory.
For Flash devices, these bits may be erased and reprogrammed.
Note:
Microchip does not recommend code protecting windowed devices.
27.2 “Configuration Word Bits”
1997 Microchip Technology Inc.
discusses the config-
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