PIC16F72-I/SOG Microchip Technology, PIC16F72-I/SOG Datasheet - Page 131
![IC PIC MCU FLASH 2KX14 28-SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16F72-I/SOG
Manufacturer Part Number
PIC16F72-I/SOG
Description
IC PIC MCU FLASH 2KX14 28-SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F72-ISO.pdf
(136 pages)
5.PIC16F72-ISO.pdf
(6 pages)
Specifications of PIC16F72-I/SOG
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F72-ISO PDF datasheet #4
- PIC16F72-ISO PDF datasheet #5
- Current page: 131 of 688
- Download datasheet (3Mb)
1997 Microchip Technology Inc.
bit
bit
bit
bit
bit
bit
Register 8-3:
ADCIF: Slope A/D Converter Comparator Trip Interrupt Flag bit
1 = An A/D conversion completed (must be cleared in software)
0 = The A/D conversion is not complete
OVFIF: Slope A/D TMR Overflow Interrupt Flag bit
1 = Slope A/D TMR overflowed (must be cleared in software)
0 = Slope A/D TMR did not overflow
PSPIF: Parallel Slave Port Read/Write Interrupt Flag bit
1 = A read or a write operation has taken place (must be cleared in software)
0 = No read or write has occurred
EEIF: EE Write Complete Interrupt Flag bit
1 = The data EEPROM write operation is complete (must be cleared in software)
0 = The data EEPROM write operation is not complete
LCDIF: LCD Interrupt Flag bit
1 = LCD interrupt has occurred (must be cleared in software)
0 = LCD interrupt has not occurred
CMIF: Comparator Interrupt Flag bit
1 = Comparator input has changed (must be cleared in software)
0 = Comparator input has not changed
Legend
R = Readable bit
U = Unimplemented bit, read as ‘0’
Note 1: The bit position of the flag bits is device dependent. Please refer to the device data
sheet for bit placement.
PIR Register (Cont’d)
W = Writable bit
Section 8. Interrupts
- n = Value at POR reset
DS31008A-page 8-9
8
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