PIC12C671-10E/P Microchip Technology, PIC12C671-10E/P Datasheet - Page 413
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PIC12C671-10E/P
Manufacturer Part Number
PIC12C671-10E/P
Description
IC MCU OTP 1KX14 A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C671-10E/P
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
- Current page: 413 of 688
- Download datasheet (3Mb)
22.6
1997 Microchip Technology Inc.
A/D Conversions
Section 22. Basic 8-bit A/D Converter
Example 22-2
inputs. The analog reference (V
conversion clock is F
Clearing the GO/DONE bit during a conversion will abort the current conversion. The ADRES
register will NOT be updated with the partially completed A/D conversion sample. That is, the
ADRES register will continue to contain the value of the last completed conversion (or the last
value written to the ADRES register). After the A/D conversion is aborted, a 2T
before the next acquisition is started. After this 2T
on the selected channel.
Example 22-2:
Figure 22-4:
;
;
;
;
Note:
Ensure that the required sampling time for the selected input
channel has elapsed. Then the conversion may be started.
Set GO bit
BSF
CLRF
BCF
MOVLW
MOVWF
BSF
BSF
BSF
T
AD
:
:
1 T
The GO/DONE bit should NOT be set in the same instruction that turns on the A/D,
due to the required acquisition time.
Holding capacitor is disconnected
from analog input
show how to perform an A/D conversion. The RA pins are configured as analog
A/D Conversion T
AD
b7
STATUS, RP0
ADCON1
STATUS, RP0
0xC1
ADCON0
INTCON, ADIE
INTCON, GIE
ADCON0, GO
Doing an A/D Conversion
2 T
RC
. The conversion is performed on the RA0 channel.
AD
b6
3 T
AD
b5
REF
4 T
AD
; Select Bank1
; Configure A/D inputs
; Select Bank0
; RC Clock, A/D is on, Channel 0 selected
;
; Enable A/D Interrupt
; Enable all interrupts
; Start A/D Conversion
; The ADIF bit will be set and the GO/DONE bit
;
;
) is the device V
Cycles
b4
AD
is cleared upon completion of the
A/D Conversion.
5 T
Holding capacitor is connected to analog input
AD
b3
6 T
AD
DD
wait, an acquisition is automatically started
. The A/D interrupt is enabled, and the A/D
AD
b2
Next Q4: ADRES is loaded
7 T
AD
b1
8 T
GO bit is cleared
ADIF bit is set
b0
AD
9 T
DS31022A-page 22-11
AD
b0
AD
10
wait is required
T
AD
11
22
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