PIC16F818T-I/ML Microchip Technology, PIC16F818T-I/ML Datasheet - Page 112
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PIC16F818T-I/ML
Manufacturer Part Number
PIC16F818T-I/ML
Description
IC MCU FLASH 1KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F818T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC16F818/819
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS39598E-page 110
Subtract W from f
[ label ]
0
d
(f) – (W)
Subtract (2’s complement method)
W register from register ‘f’. If
‘d’ = 0, the result is stored in the W
register. If ‘d’ = 1, the result is
stored back in register ‘f’.
Subtract W from Literal
[ label ]
0
k – (W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
Swap Nibbles in f
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of
register ‘f’ are exchanged. If
‘d’ = 0, the result is placed in W
register. If ‘d’ = 1, the result is
placed in register ‘f’.
f
k
[0,1]
f
[0,1]
127
255
127
SUBWF f,d
SUBLW k
W)
destination)
(destination<7:4>),
(destination<3:0>)
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Exclusive OR W with f
[ label ] XORWF
0
d
(W) .XOR. (f)
Z
Exclusive OR the contents of the
W register with register ‘f’. If
‘d’ = 0, the result is stored in the
W register. If ‘d’ = 1, the result is
stored back in register ‘f’.
(W) .XOR. k
Z
The contents of the W register
Exclusive OR Literal with W
[ label ]
0
are XORed with the eight-bit
literal ‘k’. The result is placed in
the W register.
f
[0,1]
2004 Microchip Technology Inc.
k
127
255
XORLW k
destination)
W)
f,d