PIC12C672-04I/MF Microchip Technology, PIC12C672-04I/MF Datasheet - Page 97
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12C672-04I/MF
Manufacturer Part Number
PIC12C672-04I/MF
Description
IC MCU OTP 2KX14 A/D 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC12CE673-10P.pdf
(129 pages)
3.PIC12CE673-10P.pdf
(14 pages)
Specifications of PIC12C672-04I/MF
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DFN
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Other names
PIC12C67204I/MF
12.4
DC CHARACTERISTICS
D030
D031
D032
D033
D033
D040
D040A
D041
D042
D042A
D043
D060
D061
D061A
D062
D063
D070
D080
D080A
D083
D083A
Note 1: In EXTRC oscillator configuration, the OSC1/CLKIN pin is a Schmitt Trigger input. It is not recommended that the PIC12C67X
Param
1999 Microchip Technology Inc.
No.
†
2: The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified levels represent nor-
3: Negative current is defined as coming out of the pin.
4: Does not include GP3. For GP3 see parameters D061 and D061A.
5: This spec. applies to GP3/MCLR configured as external MCLR and GP3/MCLR configured as input with internal pull-up
6: This spec. applies when GP3/MCLR is configured as an input with pull-up disabled. The leakage current of the MCLR circuit is
DC CHARACTERISTICS:
Input Low Voltage
I/O ports
MCLR, GP2/T0CKI/AN2/INT
(in EXTRC mode)
OSC1 (in EXTRC mode)
OSC1 (in XT, HS, and LP)
Input High Voltage
I/O ports
MCLR, GP2/T0CKI/AN2/INT
OSC1 (XT, HS, and LP)
OSC1 (in EXTRC mode)
Input Leakage Current (Notes 2, 3)
I/O ports
GP3/MCLR (Note 5)
GP3 (Note 6)
GP2/T0CKI
OSC1
GPIO weak pull-up current (Note 4)
MCLR pull-up current
Output Low Voltage
I/O ports
OSC2/CLKOUT
Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not
tested.
be driven with external clock in RC mode.
mal operating conditions. Higher leakage current may be measured at different input voltages.
enabled.
higher than the standard I/O logic.
with TTL buffer
with Schmitt Trigger buffer
with TTL buffer
with Schmitt Trigger buffer
Characteristic
PIC12LC671/672 (Commercial, Industrial)
PIC12LCE673/674 (Commercial, Industrial)
Standard Operating Conditions (unless otherwise specified)
Operating temperature
Operating voltage V
Section 12.2.
Sym
I
V
V
V
PUR
I
—
OL
IL
IH
IL
0.25V
0.8V
0.8V
0.7V
0.9V
2.0V
Min
V
V
V
V
V
V
DD
50
—
—
—
—
—
—
—
—
SS
SS
SS
SS
SS
SS
DD
DD
DD
DD
+ 0.8V
DD
range as described in DC spec Section 12.1 and
Typ†
250
–40°C
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0°C
0.15V
0.2V
0.2V
0.2V
0.3V
0.8V
Max
V
V
V
V
V
V
+30
400
0.6
0.6
0.6
0.6
+1
+5
+5
+5
30
T
DD
DD
DD
DD
DD
DD
T
A
A
DD
DD
DD
DD
DD
+85°C (industrial)
+70°C (commercial)
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
PIC12C67X
A
A
A
A
A
A
A
For 4.5V
otherwise
Note 1
Note 1
4.5V
otherwise
For entire V
Note 1
Vss
hi-impedance
Vss
Vss
Vss
Vss V
LP osc configuration
V
V
I
–40 C to +85 C
I
–40 C to +125 C
I
–40 C to +85 C
I
–40 C to +125 C
OL
OL
OL
OL
DD
DD
= 8.5 mA, V
= 7.0 mA, V
= TBD, V
= TBD, V
= 5V, V
= 5V, V
V
V
V
V
V
PIN
PIN
PIN
PIN
PIN
DS30561B-page 97
DD
Conditions
V
DD
PIN
PIN
DD
DD
DD
V
V
V
V
V
5.5V
DD
DD
DD
DD
DD
range
= V
= V
DD
DD
= 4.5V,
= 4.5V,
, XT, HS and
, Pin at
5.5V
= 4.5V,
= 4.5V,
SS
SS