PIC12C509-04/P Microchip Technology, PIC12C509-04/P Datasheet - Page 50
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PIC12C509-04/P
Manufacturer Part Number
PIC12C509-04/P
Description
IC MCU OTP 1KX12 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Datasheets
1.PIC12C508A-04SM.pdf
(113 pages)
2.PIC12C508A-04SM.pdf
(4 pages)
3.PIC12C508-04P.pdf
(12 pages)
Specifications of PIC12C509-04/P
Core Size
8-Bit
Program Memory Size
1.5KB (1K x 12)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
OTP
Ram Size
41 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
8-DIP (0.300", 7.62mm)
Controller Family/series
PIC12
No. Of I/o's
6
Ram Memory Size
41Byte
Cpu Speed
4MHz
No. Of Timers
1
Digital Ic Case Style
DIP
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
41 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DVMCPA, ICE2000
Minimum Operating Temperature
0 C
Package
8PDIP
Device Core
PIC
Family Name
PIC12
Maximum Speed
4 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC12C5XX
BSF
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
DS40139E-page 50
Before Instruction
After Instruction
Before Instruction
After Instruction
FLAG_REG = 0x0A
FLAG_REG = 0x8A
PC
if FLAG<1>
PC
if FLAG<1>
PC
Bit Set f
[ label ] BSF
0
0
1
Bit ’b’ in register ’f’ is set.
1
1
BSF
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
If bit ’b’ in register ’f’ is 0 then the next
instruction is skipped.
If bit ’b’ is 0 then the next instruction
fetched during the current instruction
execution is discarded, and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0110
0101
f
b
f
b
=
=
=
=
=
(f<b>)
31
31
7
7
FLAG_REG,
BTFSC
GOTO
•
•
•
address (HERE)
0,
address (TRUE);
1,
address(FALSE)
bbbf
bbbf
f,b
FLAG,1
PROCESS_CODE
ffff
ffff
7
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
PC
If FLAG<1>
PC
if FLAG<1>
PC
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ’b’ in register ’f’ is ’1’ then the next
instruction is skipped.
If bit ’b’ is ’1’, then the next instruction
fetched during the current instruction
execution, is discarded and an NOP is
executed instead, making this a 2 cycle
instruction.
1
1(2)
HERE
FALSE
TRUE
0111
f
b < 7
=
=
=
=
=
31
1999 Microchip Technology Inc.
BTFSS
GOTO
address (HERE)
0,
address (FALSE);
1,
address (TRUE)
bbbf
FLAG,1
PROCESS_CODE
ffff