PIC16C716-04E/P Microchip Technology, PIC16C716-04E/P Datasheet - Page 89

• Manufacturer Part Number: PIC16C716-04E/P
• Description: IC MCU OTP 2KX14 A/D PWM 18DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C716-04E/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 18-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

FIGURE 12-10:
TABLE 12-8:
© 2005 Microchip Technology Inc.
Note 1: ADRES register may be read on the following T
Param
No.
130
131
132
134
135
Note1: If the A/D clock source is selected as RC, a time of T
: * These parameters are characterized but not tested.
: † Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance only and are not
: § This specification ensured by design.
2: See Section 9.1 “Configuration Bits” for min. conditions.
A/D DATA
SAMPLE
A/D CLK
Sym. Characteristic
T
T
ADRES
T
T
T
SWC
tested.
CNV
ACQ
BSF ADCON0, GO
AD
GO
ADIF
GO
Q4
allows the SLEEP instruction to be executed.
A/D clock period
Conversion time (not including S/H time)
(Note 1)
Acquisition time
Q4 to A/D clock start
Switching from convert Æ sample time
134
A/D CONVERSION REQUIREMENTS
132
A/D CONVERSION TIMING
(T
OSC
/2)
Standard
Extended (LC)
Standard
Extended (LC)
7
(1)
6
OLD_DATA
CY
(Note 2)
5
1.5 §
Min.
cycle.
1.6
2.0
2.0
3.0
11
—
SAMPLING STOPPED
5*
4
T
131
130
OSC
Typ†
4.0
6.0
20
—
—
—
—
—
CY
/2 §
3
is added before the A/D clock starts. This
Max.
6.0
9.0
2
—
—
11
—
—
—
—
PIC16C712/716
Units
1
T
T
—
AD
AD
s
s
s
s
s
s
1 Tcy
T
T
A/D RC Mode
A/D RC Mode
The minimum time is the amplifier
settling time. This may be used if
the “new” input voltage has not
changed by more than 1 LSb (i.e.,
20.0 mV @ 5.12V) from the last
sampled voltage (as stated on
C
If the A/D clock source is selected
as RC, a time of T
before the A/D clock starts. This
allows the SLEEP instruction to be
executed.
0
OSC
OSC
HOLD
based, V
based, V
).
NEW_DATA
DONE
Conditions
REF
REF
DS41106B-page 87
CY
full range
3.0V
is added