PIC16C710-04E/P Microchip Technology, PIC16C710-04E/P Datasheet - Page 53
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PIC16C710-04E/P
Manufacturer Part Number
PIC16C710-04E/P
Description
IC MCU OTP 512X14 A/D 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C710-04E/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
OTP
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
36 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Operating Supply Voltage
2.5 V to 6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
8.4
8.4.1
A Power-on Reset pulse is generated on-chip when
V
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to V
external RC components usually needed to create a
Power-on Reset. A maximum rise time for V
ified. See Electrical Specifications for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met. Brown-out Reset may be used to meet the startup
conditions.
For additional information, refer to Application Note
AN607, " Power-up Trouble Shooting ."
8.4.2
The Power-up Timer provides a fixed 72 ms nominal
time-out on power-up only, from the POR. The Power-
up Timer operates on an internal RC oscillator. The
chip is kept in reset as long as the PWRT is active. The
PWRT’s time delay allows V
level. A configuration bit is provided to enable/disable
the PWRT.
FIGURE 8-10: BROWN-OUT SITUATIONS
Applicable Devices
Applicable Devices
DD
1997 Microchip Technology Inc.
rise is detected (in the range of 1.5V - 2.1V). To
Power-on Reset (POR), Power-up
Timer (PWRT) and Oscillator Start-up
Timer (OST), and Brown-out Reset
(BOR)
POWER-ON RESET (POR)
POWER-UP TIMER (PWRT)
Internal
Internal
Internal
Reset
Reset
Reset
V
V
V
DD
DD
DD
710 71 711 715
710 71 711 715
DD
to rise to an acceptable
DD
. This will eliminate
DD
is spec-
<72 ms
72 ms
The power-up time delay will vary from chip to chip due
to V
parameters for details.
8.4.3
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal oscil-
lator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
8.4.4
A configuration bit, BODEN, can disable (if clear/pro-
grammed) or enable (if set) the Brown-out Reset cir-
cuitry. If V
greater than parameter #35, the brown-out situation will
reset the chip. A reset may not occur if V
4.0V for less than parameter #35. The chip will remain
in Brown-out Reset until V
Power-up Timer will now be invoked and will keep the
chip in RESET an additional 72 ms. If V
BV
go back into a Brown-out Reset and the Power-up
Timer will be initialized. Once V
the Power-up Timer will execute a 72 ms time delay.
The Power-up Timer should always be enabled when
Brown-out Reset is enabled. Figure 8-10 shows typical
brown-out situations.
Applicable Devices
Applicable Devices
DD
DD
72 ms
72 ms
while the Power-up Timer is running, the chip will
, temperature, and process variation. See DC
OSCILLATOR START-UP TIMER (OST)
BROWN-OUT RESET (BOR)
DD
falls below 4.0V (3.8V - 4.2V range) for
PIC16C71X
710 71 711 715
710 71 711 715
DD
rises above BV
BV
BV
BV
DD
DD
DD
DD
rises above BV
DS30272A-page 53
DD
DD
drops below
falls below
DD
. The
DD
,