PIC16C771-I/SO Microchip Technology, PIC16C771-I/SO Datasheet - Page 25

IC MCU OTP 4KX14 A/D PWM 20SOIC

PIC16C771-I/SO

Manufacturer Part Number
PIC16C771-I/SO
Description
IC MCU OTP 4KX14 A/D PWM 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C771-I/SO

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Number Of I /o
15
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 6x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
16
Ram Memory Size
256Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
I2C, SPI, SSP
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164028 - MODULE SKT PROMATEII 20SOIC/DIP309-1013 - ADAPTER 20-SOIC TO 20-DIP309-1012 - ADAPTER 20-SOIC TO 20-DIP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC16C771I/SO

Available stocks

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Part Number
Manufacturer
Quantity
Price
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Part Number:
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Quantity:
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The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer). This is indirect addressing.
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-1.
FIGURE 2-5:
2002 Microchip Technology Inc.
RP1:RP0
bank select
Note 1: For register file map detail see Figure 2-3.
location select
6
Direct Addressing
DIRECT/INDIRECT ADDRESSING
Data
Memory(1)
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
100h
17Fh
Bank 2
10
EXAMPLE 2-1:
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-5.
NEXT
CONTINUE
180h
1FFh
PIC16C717/770/771
Bank 3
11
movlw
movwf
clrf
incf
btfss
goto
:
IRP
bank select
0x20
FSR
INDF
FSR
FSR,4
NEXT
7
Indirect Addressing
How to Clear RAM Using
Indirect Addressing
;initialize pointer
;
;clear INDF register
;inc pointer
;all done?
;NO, clear next
;YES, continue
FSR register
to RAM
DS41120B-page 23
location select
0

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