PIC18F44J10-I/PT Microchip Technology, PIC18F44J10-I/PT Datasheet - Page 343

• Manufacturer Part Number: PIC18F44J10-I/PT
• Description: IC PIC MCU FLASH 8KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F44J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (8K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPIC/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 13-ch x 10-bit
• Package: 44TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180013 - MODULE PLUG-IN 18F45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164330 - MODULE SKT FOR 44TQFP 18F45J10
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

APPENDIX A:
Revision A (March 2005)
Original data sheet for PIC18F45J10 family devices.
Revision C (January 2007)
This revision includes updates to the packaging
diagrams.
TABLE B-1:
© 2007 Microchip Technology Inc.
Operating Frequency
Supply Voltage
Operating Current
Program Memory Endurance
I/O Sink/Source at 25 mA
Input Voltage Tolerance on I/O pins
I/O
Pull-ups
Oscillator Options
Program Memory Retention
Programming Time (Normalized)
Programming Entry
Code Protection
Configuration Words
Start-up Time from Sleep
Power-up Timer
Data EEPROM
BOR
LVD
A/D Calibration
In-Circuit Emulation
TMR3
Second MSSP
Note 1:
2:
BOR is not available on PIC18LFXXJ10 devices.
Available on 40/44-pin devices only.
Characteristic
NOTABLE DIFFERENCES BETWEEN PIC18F4520 AND PIC18FXXXX FAMILIES
REVISION HISTORY
156 μs/byte (10 ms/64-byte block)
1,000 write/erase cycles (typical)
(EC, HS, fixed 32 kHz INTRC)
Low Voltage, Key Sequence
Single block, all or nothing
PORTB and PORTC only
Stored in last 4 words of
Program Memory space
5.5V on digital only pins
PIC18FXXXX Family
10 years (minimum)
40 MHz @ 2.15V
Preliminary
200 μs (typical)
Limited options
Simple BOR
Not available
Not available
Not available
Not available
Available
Always on
2.0V-3.6V
Required
PORTB
Low
32
PIC18F45J10 FAMILY
(2)
APPENDIX B:
Devices in the PIC18F45J10 family and PIC18F4520
families are very similar in their functions and feature
sets. However, there are some potentially important
differences
migrating an application across device families to
achieve a new design goal. These are summarized in
Table B-1. The areas of difference which could be a
major impact on migration are discussed in greater
detail later in this section.
(1)
which should
100,000 write/erase cycles (typical)
More options (EC, HS, XT, LP, RC,
15.6 μs/byte (1 ms/64-byte block)
Multiple code protection blocks
Stored in Configuration Space,
MIGRATION
BETWEEN HIGH-END
DEVICE FAMILIES
PIC18F4520 Family
PLL, flexible INTRC)
Programmable BOR
40 years (minimum)
starting at 300000h
V
40 MHz @ 4.2V
DD
10 μs (typical)
V
Configurable
Not available
Not required
PP
2.0V-5.5V
Available
Available
on all I/O pins
Available
Available
be
All ports
PORTB
Lower
and LVP
36
DS39682C-page 341
considered
when