AT32UC3L016-D3UR Atmel, AT32UC3L016-D3UR Datasheet - Page 780
AT32UC3L016-D3UR
Manufacturer Part Number
AT32UC3L016-D3UR
Description
MCU AVR32 16KB FLASH 48TLLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3L-EK.pdf
(858 pages)
Specifications of AT32UC3L016-D3UR
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TLLGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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31.6.8.5
31.6.8.6
31.6.8.7
Table 31-58. STATUS_INFO Contents
32099F–11/2010
Bit number
15-9
4-1
8
7
6
5
0
MEMORY_READWRITE_STATUS
BAUD_RATE
STATUS_INFO
Name
Reserved
Reserved
Protected
SAB busy
Chip erase ongoing
CPU halted
Reset status
After a MEMORY_WRITE command this response is sent by AW. The response can also be
sent after a MEMORY_READ command if AW encountered an error when receiving the
address. The response contains 3 bytes, where the first is the status of the command and the 2
next contains the byte count when the first error occurred. The first byte is encoded this way:
Table 31-55. MEMORY_READWRITE_STATUS Status Byte
Table 31-56. MEMORY_READWRITE_STATUS Details
The current baud rate in the AW. See
Table 31-57. BAUD_RATE Details
A status message from AW.
status byte
0x00
0x01
0x02
Other
Response
Response value
Additional data
Response
Response value
Additional data
Description
The protection bit in the internal flash is set. SAB access is restricted. This bit
will read as one during reset.
The SAB bus is busy with a previous transfer. This could indicate that the CPU
is running on a very slow clock, the CPU clock has stopped for some reason
or that the part is in constant reset.
The Chip erase operation has not finished.
This bit will be set if the CPU is halted. This bit will read as zero during reset.
This bit will be set if AW has reset the CPU using the RESET command.
Description
Write successful
SAB busy
Bus error (wrong address)
Reserved
Details
0xC2
Status byte and byte count (2 bytes)
Details
0xC3
Baud rate
Section 31.6.6.7
for more details.
AT32UC3L016/32/64
780
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