DSPIC33FJ12GP202-I/SS Microchip Technology, DSPIC33FJ12GP202-I/SS Datasheet
DSPIC33FJ12GP202-I/SS
Specifications of DSPIC33FJ12GP202-I/SS
Related parts for DSPIC33FJ12GP202-I/SS
DSPIC33FJ12GP202-I/SS Summary of contents
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... Microchip corporate web site (www.microchip.com). TABLE 1: SILICON DEVREV VALUES Part Number dsPIC33FJ12GP201 dsPIC33FJ12GP202 Note 1: The Device and Revision IDs (DEVID and DEVREV) are located at the last two implemented addresses in program memory. 2: Refer to the “dsPIC33F/PIC24H Flash Programming Specification” (DS70152) for detailed information on Device and Revision IDs for your specific device. © ...
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... PSV page. 2 When the I C module is configured as a 10-bit slave with an address of 0x102, the I2CxRCV register content for the lower address byte is 0x01 rather than 0x02. Affected (1) Revisions © 2010 Microchip Technology Inc. ...
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... Consumption in Sleep Mode Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. Issue Summary 2 With the I C module enabled, the port bits and external interrupt input functions (if any) associated with SCL and SDA pins do not reflect the actual digital logic levels on the pins ...
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... When an auto-baud is detected, the receive interrupt may occur twice. The first interrupt occurs at the beginning of the Start bit and the second after reception of the Sync field character. Work around If an extra interrupt is detected, ignore the additional interrupt. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
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... Service Routine must be included in the user application. Affected Silicon Revisions © 2010 Microchip Technology Inc. 10. Module: SPI Setting the DISSCK bit in the SPIxCON1 register does not allow the user application to use the SCK pin as a General Purpose I/O pin. Work around None. Affected Silicon Revisions ...
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... Work around If the SDA and/or SCL pins need to be polled, these pins should be connected to other port pins in order to be read correctly. This issue does not 2 affect the operation of the I C module. Affected Silicon Revisions © 2010 Microchip Technology Inc. the module (if any) ...
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... Store the value of the ACKSTAT bit immediately after receiving a NACK. Affected Silicon Revisions © 2010 Microchip Technology Inc. 22. Module: CPU The EXCH instruction does not execute correctly. Work around addresses writing recommended work around is to replace: EXCH Wsource, Wdestination with: PUSH Wdestination ...
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... ADON bit after waking from Sleep. Affected Silicon Revisions EXAMPLE 1: AD1CON1bits.ADON = 0; __asm__ volatile ("REPEAT #50"); __asm__ volatile ("NOP"); Sleep(); DS80462E-page 8 specifications #0 1, the user //Disable the ADC module //Wait 50 Tcy //Repeat NOP 51 times // Execute PWRSAV #0 and go to Sleep © 2010 Microchip Technology Inc. ...
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... Input Low Voltage IL DI18 SDAx, SCLx DI19 SDAx, SCLx V Input High Voltage IH DI28 SDAx, SCLx DI29 SDAx, SCLx © 2010 Microchip Technology Inc. specifica- IL Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C ≤ T -40°C ≤ T Min Typ Max Units V — ...
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... Added revision A5 silicon references throughout the document. Updated silicon issue 22 (CPU). Added silicon issue 25 (ADC) and data sheet clarification 1 (DC Characteristics: I/O Pin Input Specifications). Rev E Document (10/2010) Updated the work around in silicon issue 25 (ADC). DS80462E-page 10 2 C), 13 (Product and 22 © 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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