PIC16F819-I/SSTSL Microchip Technology, PIC16F819-I/SSTSL Datasheet - Page 3
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PIC16F819-I/SSTSL
Manufacturer Part Number
PIC16F819-I/SSTSL
Description
IC PIC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F819-I/SSTSL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
4. Module: PORTB Pull-ups
5. Module: PORTB
© 2005 Microchip Technology Inc.
The PORTB weak pull-ups will not be disabled
under the following conditions: RBPU = 0 (Option
register) and SSPEN = 1 (SSPCON register) as
indicated by the RB7:RB0 I/O block diagrams in
Section 5.0 “I/O Ports”.
Work around
1. If the SPP module is enabled, do not enable
2. If the SSP module and PORTB pull-ups are
Date Codes that pertain to this issue:
All date codes.
A delay of 1 T
modifies the contents of PORTB simultaneously
occurs when any of the following modules (if
enabled) executes an operation that effects the
signals on their respective PORTB I/O pins.
CCP Module:
PWM Mode (CCP1CON<3:0> = 11xx)
When CCP1CON<5:4> bits = 10, the PWM output
signal will be delayed by 1 T
instruction to modify the contents of PORTB is
executed.
SSP Module:
SPI Slave Modes (SSPCON<3:0> = 0100 and 0101)
Clock signal is derived from an external source.
Transmission of data (SDO pin) will be delayed by
1 T
of PORTB is executed. Reception of data is not
affected.
Work around
None
Date Codes that pertain to this issue:
All date codes.
OSC
the PORTB weak pull-ups and use external
pull-up resistors.
enabled, then evaluate the functionality of the
SSP (I
operation within your application.
when an instruction to modify the contents
2
C™/SPI™) module to ensure proper
OSC
will occur if an instruction that
OSC
when an
6. Module: Internal RC Oscillator
7. Module: PORTB Interrupts
When any one of the seven INTOSC frequencies
is enabled by the following conditions, it is possible
for the oscillator to overshoot the selected
frequency.:
1. A clock switch from INTRC (31 kHz) to an
2. Exit from Sleep mode with the IRCF bits
If the selected frequency is 8 MHz, then the
Voltage versus Frequency specification of the
device may be violated.
Work around
When it is required for the application to run at
8 MHz, it is recommended that the application does
not start executing code at 8 MHz until the 60 ms
firmware delay (see issue 3) has completed. During
the 60 ms settling period, the application can
execute code up to 4 MHz. Upon completion of the
60 ms firmware delay, the 8 MHz can be selected
via the IRCF bits.
Date Codes that pertain to this issue:
All date codes.
When the PORTB interrupt-on-change feature and
a PORTB peripheral are enabled simultaneously,
the PORTB peripheral input signal’s rising and
falling edges will trigger an interrupt-on-change
event. This is due to the interrupt-on-change
feature not being disabled on the respective pin for
that peripheral when it is enabled.
The affected pins and peripheral signals on
PORTB are RB4: SCK and SCL, RB5: SS and
RB6: T1CKI. The functionality of T1OSI (RB7) and
T1OSO (RB6) is not affected by this issue.
Work around
None.
INTOSC (125 kHz-8 MHz) frequency via the
IRCF bits (OSCCON register).
already configured for an INTOSC frequency.
PIC16F818/819
DS80159F-page 3