PIC16C554-04I/P Microchip Technology, PIC16C554-04I/P Datasheet - Page 27
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PIC16C554-04I/P
Manufacturer Part Number
PIC16C554-04I/P
Description
IC MCU OTP 512X14 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C554-04I/P
Core Size
8-Bit
Program Memory Size
896B (512 x 14)
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
80Byte
Cpu Speed
4MHz
No. Of Timers
1
Processor Series
PIC16C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
80 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
2002 Microchip Technology Inc.
5.2
PORTB is an 8-bit wide bi-directional port. The
corresponding data direction register is TRISB. A '1' in
the TRISB register puts the corresponding output driver
in a Hi-impedance mode. A '0' in the TRISB register
puts the contents of the output latch on the selected
pin(s).
Reading PORTB register reads the status of the pins
whereas writing to it will write to the port latch. All write
operations are read-modify-write operations. So a write
to a port implies that the port pins are first read, then
this value is modified and written to the port data latch.
Each of the PORTB pins has a weak internal pull-up
(≈200 µA typical). A single control bit can turn on all the
pull-ups. This is done by clearing the RBPU
(OPTION<7>) bit. The weak pull-up is automatically
turned off when the port pin is configured as an output.
The pull-ups are disabled on Power-on Reset.
Four of PORTB’s pins, RB7:RB4, have an interrupt-on-
change feature. Only pins configured as inputs can
cause this interrupt to occur (i.e., any RB7:RB4 pin
configured as an output is excluded from the interrupt-
on-change comparison). The input pins (of RB7:RB4)
are compared with the old value latched on the last
read of PORTB. The “mismatch” outputs of RB7:RB4
are OR’ed together to generate the RBIF interrupt (flag
FIGURE 5-3:
Set RBIF
Data Bus
WR PORTB
WR TRISB
RB7:RB6 in Serial Programming mode
Note
From other
RB7:RB4 pins
PORTB and TRISB Registers
1:
TRISB = 1 enables weak pull-up if RBPU = ‘0’ (OPTION<7>).
RBPU
RD TRISB
RD PORTB
TRIS Latch
Data Latch
D
CK
D
CK
(1)
BLOCK DIAGRAM OF RB7:RB4 PINS
Q
Q
Q
Q
Q
Latch
EN
EN
D
D
V
V
P
N
SS
DD
RD PORTB
TTL
Input
Buffer
V
P
DD
ST
Buffer
weak
pull-up
Preliminary
V
V
DD
SS
latched in INTCON<0>). This interrupt can wake the
device from SLEEP. The user, in the interrupt service
routine, can clear the interrupt in the following manner:
• Any read or write of PORTB (this will end the mis-
• Clear flag bit RBIF
A mismatch condition will continue to set flag bit RBIF.
Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared.
The interrupt on mismatch feature, together with
software configurable pull-ups on these four pins,
allows easy interface to a key pad and make it possible
for wake-up on key-depression. (See AN552 in the
Microchip Embedded Control Handbook.)
The interrupt-on-change feature is recommended for
wake-up on key depression operation and operations
where PORTB is only used for the interrupt-on-change
feature. Polling of PORTB is not recommended while
using the interrupt-on-change feature.
I/O
pin
match condition)
Note 1: If a change on the I/O pin should occur
when the read operation is being exe-
cuted (start of the Q2 cycle), then the
RBIF interrupt flag may not get set.
PIC16C55X
DS40143D-page 25