ATTINY261V-10SU Atmel, ATTINY261V-10SU Datasheet - Page 195

IC MCU AVR 2K FLASH 10MHZ 20SOIC

ATTINY261V-10SU

Manufacturer Part Number
ATTINY261V-10SU
Description
IC MCU AVR 2K FLASH 10MHZ 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY261V-10SU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SOIC (7.5mm Width)
Package
20SOIC
Device Core
AVR
Family Name
ATtiny
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
16
Interface Type
USI
On-chip Adc
11-chx10-bit
Number Of Timers
2
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRBC100 - REF DESIGN KIT BATTERY CHARGER770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY261V-10SU
Manufacturer:
Atmel
Quantity:
3 989
Part Number:
ATTINY261V-10SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Figure 19-8. Parallel Programming Timing, Reading Sequence (within the Same Page) with Timing Requirements
Note:
2588E–AVR–08/10
PAGEL/BS1
XA1/BS2
XTAL1
DATA
XA0
The timing requirements shown in
OE
ADDR0 (Low Byte)
LOAD ADDRESS
(LOW BYTE)
Table 19-9.
Symbol
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
DVXH
XLXH
XHXL
XLDX
XLWL
BVPH
PHPL
PLBX
WLBX
PLWL
BVWL
WLWH
WLRL
WLRH
WLRH_CE
XLOL
PP
t
XLOL
t
OLDV
Figure 19-6
Parameter
Programming Enable Voltage
Programming Enable Current
Data and Control Valid before XTAL1 High
XTAL1 Low to XTAL1 High
XTAL1 Pulse Width High
Data and Control Hold after XTAL1 Low
XTAL1 Low to WR Low
BS1 Valid before PAGEL High
PAGEL Pulse Width High
BS1 Hold after PAGEL Low
BS2/1 Hold after WR Low
PAGEL Low to WR Low
BS1 Valid to WR Low
WR Pulse Width Low
WR Low to RDY/BSY Low
WR Low to RDY/BSY High
WR Low to RDY/BSY High for Chip Erase
XTAL1 Low to OE Low
Parallel Programming Characteristics, V
(i.e., t
DATA (Low Byte)
READ DATA
(LOW BYTE)
DVXH
, t
XHXL
(1)
, and t
t
BVDV
XLDX
) also apply to reading operation.
(2)
(HIGH BYTE)
READ DATA
DATA (High Byte)
CC
= 5V ± 10%
11.5
Min
200
150
150
150
3.7
7.5
67
67
67
67
67
67
67
0
0
0
t
OHDZ
Typ
LOAD ADDRESS
(LOW BYTE)
ADDR1 (Low Byte)
Max
12.5
250
4.5
1
9
Units
µA
ms
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
V
195

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