ATMEGA168P-20MQ Atmel, ATMEGA168P-20MQ Datasheet
ATMEGA168P-20MQ
Specifications of ATMEGA168P-20MQ
Related parts for ATMEGA168P-20MQ
ATMEGA168P-20MQ Summary of contents
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... Power-down Mode: 0.1 µA – Power-save Mode: 0.8 µA (Including 32 kHz RTC) Note: 1. See ”Data Retention” on page 7 ® 8-Bit Microcontroller ( compatible) for details. 8-bit Microcontroller with 4/8/16K Bytes In-System Programmable Flash ATmega48P/V ATmega88P/V ATmega168P/V Summary Rev. 8025LS–AVR–7/10 ...
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Pin Configurations Figure 1-1. Pinout ATmega48P/88P/168P TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 ...
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Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive ...
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The various special features of Port D are elaborated in 85. 1.1 the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6. It should be externally CC connected to V through a low-pass filter. Note ...
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Block Diagram Figure 2-1. Block Diagram Watchdog Watchdog Oscillator Oscillator Circuits / Generation EEPROM 8bit T/C 0 8bit T/C 2 USART 0 PORT D (8) 8025LS–AVR–7/10 Power Timer Supervision POR / BOD & RESET Flash Clock 16bit T/C 1 ...
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... C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators, and Evaluation kits. 2.2 Comparison Between ATmega48P, ATmega88P and ATmega168P The ATmega48P, ATmega88P and ATmega168P differ only in memory sizes, boot loader sup- port, and interrupt vector sizes. sizes for the three devices. Table 2-1. ...
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In ATmega48P, there is no Read-While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the entire Flash. 8025LS–AVR–7/10 ATmega48P/88P/168P 7 ...
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... Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. Note: 4. Data Retention Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over 20 years at 85°C or 100 years at 25°C. ...
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Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...
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Address Name Bit 7 (0xC1) UCSR0B RXCIE0 (0xC0) UCSR0A RXC0 (0xBF) Reserved – (0xBE) Reserved – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved ...
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Address Name Bit 7 (0x7F) DIDR1 – (0x7E) DIDR0 – (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved ...
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Address Name Bit 7 0x1D (0x3D) EIMSK – 0x1C (0x3C) EIFR – 0x1B (0x3B) PCIFR – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...
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Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...
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... MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break Note: 1. These instructions are only available in ATmega168P. 8025LS–AVR–7/10 Description Rd ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip Debug Only ATmega48P/88P/168P Operation Flags ...
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... Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...
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... Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS directive).Also Halide free and fully Green. ...
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... Wide, Plastic Dual Inline Package (PDIP) 32M1-A 32-pad 1.0 body, Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8025LS–AVR–7/10 (2) Ordering Code ATmega168PV-10AU ATmega168PV-10MU ATmega168PV-10PU ATmega168P-20AU ATmega168P-20MU ATmega168P-20PU and Figure 28-2 on page 311. Package Type ATmega48P/88P/168P (1) Package Operational Range ...
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Packaging Information 9.1 32A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...
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... Pin TOP VIEW 0.20 b 0.4 Ref BOTTOM VIEW (4x) The terminal # Laser-marked Feature. Note: Package Drawing Contact: packagedrawings@atmel.com 8025LS–AVR–7/ TITLE 28M1, 28-pad 1.0 mm Body, Lead Pitch 0.45 mm, 2.4 x 2.4 mm Exposed Pad, Thermally Enhanced Plastic Very Thin Quad Flat No Lead Package (VQFN) ...
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Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...
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A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 8025LS–AVR–7/10 ...
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... The revision letter in this section refers to the revision of the ATmega88P device. 10.2.1 Rev. C Not sampled. 10.2.2 Rev known errata. 10.2.3 Rev known errata. 10.3 Errata ATmega168P The revision letter in this section refers to the revision of the ATmega168P device. 10.3.1 Rev B No known errata. 10.3.2 Rev A No known errata. 8025LS–AVR–7/10 ATmega48P/88P/168P 23 ...
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... Updated the footnote Note1 of the Updated the Table 8-5 on page 30 Updated the Table 8-10 on page 33 Updated the footnote Note1 of the ATmega48P/88P/168P ”ATmega48P DC Characteris- ”ATmega88P DC Characteris- ”ATmega168P DC Characteris- ”” on page 311. 408. Table 8-3 on page 29. by removing a footnote Note1. by removing a footnote Note1. Table 8-12 on page 34 ...
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... Table 28-4 in ”System and Reset Characteristics” on page ATmega48P/88P/168P ”ATmega48P DC Characteristics” on page 309 ”ATmega88P DC Characteristics” on page 310 ”ATmega168P DC Characteristics” on page 310 ”” on page 311 and removed TBD from the table. Table 28-4 on page 313 correct one correct one. ...
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... Frequency Crystal Oscillator” on page Removed JTD bit from ”MCUCR – MCU Control Register” on page Updated typical and general program setup for Reset and Interrupt Vector Addresses in ”Interrupt Vectors in ATmega168P” on page 62 ATmega328P” on page 65. Updated Interrupt Vectors Start Address in page 66 ...
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... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...