PIC16F870-E/SP Microchip Technology, PIC16F870-E/SP Datasheet - Page 34
PIC16F870-E/SP
Manufacturer Part Number
PIC16F870-E/SP
Description
IC MCU CMOS 20MHZ 2K FLASH 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F870-ISO.pdf
(172 pages)
4.PIC16F870-ISO.pdf
(6 pages)
Specifications of PIC16F870-E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
22
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163022, DV164120
Minimum Operating Temperature
- 40 C
On-chip Adc
28 bit
For Use With
I3-DB16F871 - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F870-ISO PDF datasheet #3
- PIC16F870-ISO PDF datasheet #4
- Current page: 34 of 172
- Download datasheet (4Mb)
PIC16F870/871
3.10
The configuration word contains a bit that write protects
the FLASH program memory, called WRT. This bit can
only
PIC16F870/871 devices via ICSP. Once write protec-
tion is enabled, only an erase of the entire device will
disable it. When enabled, write protection prevents any
writes to FLASH program memory. Write protection
does not affect program memory reads.
TABLE 3-1:
TABLE 3-2:
DS30569B-page 32
0Bh, 8Bh,
10Bh, 18Bh
10Dh
10Fh
10Ch
10Eh
18Ch
18Dh
Legend:
Note 1:
Address
CP1
0
0
0
0
0
1
1
1
1
1
1
Configuration Bits
be
FLASH Program Memory Write
Protection
Shaded cells are not used during FLASH/EEPROM access.
These bits are reserved; always maintain these bits clear.
x = unknown, u = unchanged, r = reserved, - = unimplemented, read as '0'.
INTCON
EEADR
EEADRH
EEDATA
EEDATH
EECON1
EECON2 EEPROM Control Register2 (not a physical register)
accessed
CP0
Name
0
1
1
1
1
0
0
0
0
1
1
READ/WRITE STATE OF INTERNAL FLASH PROGRAM MEMORY
REGISTERS ASSOCIATED WITH DATA EEPROM/PROGRAM FLASH
EEPROM Address Register, Low Byte
EEPROM Data Register, Low Byte
EEPGD
WRT
Bit 7
GIE
when
x
0
0
1
1
0
0
1
1
0
1
—
—
PEIE
Bit 6
programming
—
—
—
All program memory
All program memory
All program memory
Memory Location
Unprotected areas
Unprotected areas
Unprotected areas
Unprotected areas
Protected areas
Protected areas
Protected areas
Protected areas
EEPROM Data Register, High Byte
Bit 5
T0IE
—
—
EEPROM Address, High Byte
INTE
Bit 4
the
—
WRERR
RBIE
Bit 3
Internal
WREN
Read
Bit 2
T0IF
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
INTF
Bit 1
WR
Internal
Write
Yes
Yes
Yes
No
No
No
No
No
No
No
No
RBIF
Bit 0
RD
2003 Microchip Technology Inc.
ICSP Read ICSP Write
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
x--- x000 x--- u000
POR, BOR
Value on:
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
—
Value on
RESETS
all other
Yes
Yes
No
No
No
No
No
No
No
No
No
—
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