PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet
PIC16F628A-I/ML
Specifications of PIC16F628A-I/ML
Related parts for PIC16F628A-I/ML
PIC16F628A-I/ML Summary of contents
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... PIC16F627A/628A/648A EEPROM Memory Programming Specification This document includes the programming specifications for the following devices: • PIC16F627A • PIC16F628A • PIC16F648A • PIC16LF627A • PIC16LF628A • PIC16LF648A Note: All references to PIC16F627A/628A/648A also apply to PIC16LF62XA devices. FIGURE 1-1: PIN DIAGRAM PDIP, SOIC RA2/AN2/V • ...
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... MCLR does not draw any significant current. DS41196G-page PIC16F627A/628A 648A During Programming Pin Type I Low-voltage programming input if Configuration bit equals 1 I Clock input I/O Data input/output (1) P Program Mode Select P Power Supply P Ground Preliminary RA7/OSC1/CLKIN RA6/OSC2/CLKOUT RB7/DATA/T1OSI RB6/CLOCK/T1OSO/T1CKI Pin Description © 2007 Microchip Technology Inc. ...
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... Programming the EE Data memory uses the same PC as program memory, though only the lower bits are decoded and used. TABLE 2-1: Device PIC16F627A/628A PIC16F648A TABLE 2-2: Device PIC16F627A PIC16F628A PIC16F648A MCU configu- checksum Preliminary EE DATA CAPACITY EE Data PC Bits Memory Decoded 128 ...
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... User ID Location 2001 User ID Location 2002 User ID Location 2003 User ID Location 2004 Reserved 2005 Reserved 2006 Device ID 2007 Configuration Word DS41196G-page Implemented Implemented 0x3FF 0x7FF 0xFFF 1FFF 2000 Implemented Implemented 2008 Not Implemented 3FFF Preliminary © 2007 Microchip Technology Inc Implemented Implemented ...
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... Load), require a minimum delay of T DLY command and the data. The 6-bit command sequences are shown in Table 2-3. TABLE 2-3: COMMAND MAPPING FOR PIC16F627A/PIC16F628A/PIC16F648A Command Load Configuration Load Data for Program Memory Load Data for Data Memory Increment Address ...
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... LVP mode. DS41196G-page 6 FIGURE 2-3: Thld0 V DD PGM MCLR , then DD DATA CLOCK Note: If the device is in LVP mode, raising V V will override LVP mode. IHH Preliminary ENTERING LOW VOLTAGE PROGRAM/ VERIFY MODE Tlvpp Tppdp to PP © 2007 Microchip Technology Inc. ...
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... FIGURE 2-5: LOAD DATA COMMAND FOR DATA MEMORY RB6 (CLOCK) RB7 (DATA SET T 1 HLD © 2007 Microchip Technology Inc. PIC16F627A/628A/648A T 2 DLY LSb strt_bit T 2 DLY ...
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... FIGURE 2-7: BEGIN PROGRAMMING ONLY CYCLE 1 RB6 (CLOCK) RB7 0 (DATA) DS41196G-page DLY First Data Word LSb strt_bit SET T 1 HLD Preliminary stp_bit MSb T – Data Memory DPROG T – Program Memory PROG Next Command © 2007 Microchip Technology Inc. ...
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... Output mode on the second rising clock edge and revert back to Input mode (high-impedance) after the 16th rising edge. FIGURE 2-9: READ DATA FROM PROGRAM MEMORY RB6 (CLOCK RB7 0 (DATA SET T HLD RB7 = Input © 2007 Microchip Technology Inc. PIC16F627A/628A/648A T 2 DLY DLY T 1 HLD T 2 DLY 1 2 ...
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... As only 8 bits are transmitted, the last 8 bits are zero padded. FIGURE 2-10: READ DATA FROM DATA MEMORY RB6 (CLOCK RB7 (DATA) Tset1 T 1 HLD RB7 = Input DS41196G-page DLY DLY strt_bit LSb T 1 DLY Preliminary stp_bit MSb RB7 Input RB7 = Output © 2007 Microchip Technology Inc. ...
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... X Bulk Erase Program Memory X Bulk Erase Program Memory X Bulk Erase Program Memory X © 2007 Microchip Technology Inc. PIC16F627A/628A/648A 3.1 Bulk Erase Program Memory The program memory can be erased with the Bulk Erase Program Memory command. Note: All Bulk Erase operations must take place ...
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... RB7 1 (DATA) DS41196G-page 12 To perform a Bulk Erase of the data memory, the following sequence must be performed: 1. Execute a Bulk Erase Data memory command. 2. Wait T ERA SET T 1 HLD Preliminary for the erase cycle to complete. ERA Next Command DLY X © 2007 Microchip Technology Inc. ...
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... Program Memory Data Correct? Increment No All Locations Address Done? Command Verify all Locations Report Verify No Error @ Data Correct? V DDNOM Done © 2007 Microchip Technology Inc. PIC16F627A/628A/648A Start Low Voltage Programming Set Set PGM = V DD Set MCLR = V DD Report No Programming Failure Yes ...
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... Load Configuration Data No Yes Program ID Program Cycle Location? Report Programming Failure Program Cycle (Config. Word) Report Program No Configuration Data Correct? Word Error Done Preliminary Read Data Command No Data Correct? Yes Set DDNOM Read Data Command Yes © 2007 Microchip Technology Inc. ...
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... PROGRAM FLOWCHART – PIC16F627A/628A/648A DATA MEMORY Start Program Cycle Read Data from Data Memory Data Correct? Increment No All Locations Address Done? Command Data Correct? Done © 2007 Microchip Technology Inc. PIC16F627A/628A/648A Report No Programming Failure Yes Yes No Report Verify Error Yes Preliminary PROGRAM CYCLE Load Data ...
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... Locations @ V DS41196G-page 16 Start Low Voltage Programming Set Set PGM = V DD Set MCLR = Start Yes Report No Programming Failure Yes Done? Yes DDNOM Done Preliminary PROGRAM CYCLE Load Data for Program Memory Command Begin Programming Command Wait T PROG © 2007 Microchip Technology Inc. ...
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... These bits can be set (reads ‘0’) or left unchanged (reads ‘1’), to select various device configurations. 3.7 Device ID Word The device ID word for the PIC16F627A/628A/648A is hard coded at 2006h. REGISTER 3-1: CONFIGURATION WORD FOR PIC16F627A/PIC16F628A/PIC16F648A (ADDRESS: 2007h) R/P-1 U-1 U-1 U-1 U-1 CP — ...
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... Specifically for the PIC16F627A/628A/648A, the EEPROM data memory should also be embedded in the hex file (see Section 3.9 “Embedding Data EEPROM Contents in Hex File”). Microchip Technology Inc. feels strongly that this feature is important for the benefit of the end customer. DS41196G-page 18 Preliminary ...
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... Checksum is calculated by reading the contents of the PIC16F627A/628A/648A memory locations and adding up the opcodes up to the maximum user addressable location (e.g., 0x7FF for the PIC16F628A). Any carry bits exceeding 16 bits are neglected. Finally, the Con- figuration Word (appropriately masked) is added to the checksum. Checksum computation for each member of the PIC16F627A/628A/648A devices is shown in Table 3-3 ...
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... DLY T 2 1.0 — — DLY T 3 — — 80 DLY T — — 4 PROG T — — 6 DPROG T — — 6 ERA Preliminary © 2007 Microchip Technology Inc. Conditions/ Units Comments μs μs μs V Schmitt Trigger input V Schmitt Trigger input ns μ μs μ ...
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... PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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