PIC16CE625-04E/SS Microchip Technology, PIC16CE625-04E/SS Datasheet - Page 71
![IC MCU OTP 2KX14 EE COMP 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16CE625-04E/SS
Manufacturer Part Number
PIC16CE625-04E/SS
Description
IC MCU OTP 2KX14 EE COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16CE623-04P.pdf
(113 pages)
Specifications of PIC16CE625-04E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
For Use With
309-1016 - ADAPTER 20-SSOP TO 18-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
1999 Microchip Technology Inc.
Unconditional Branch
[ label ]
0
k
PCLATH<4:3>
None
GOTO is an unconditional branch. The
eleven bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH<4:3>.
GOTO is a two-cycle instruction.
1
2
After Instruction
Increment f
[ label ]
0
d
(f) + 1
Z
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in the W register. If ’d’ is 1, the
result is placed back in register ’f’.
1
1
Before Instruction
After Instruction
GOTO THERE
INCF
10
00
k
f
[0,1]
PC<10:0>
127
2047
PC =
CNT
Z
CNT
Z
(dest)
GOTO k
INCF f,d
1kkk
1010
CNT, 1
PC<12:11>
Address THERE
=
=
=
=
kkkk
dfff
0xFF
0
0x00
1
kkkk
ffff
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
None
The contents of register ’f’ are
incremented. If ’d’ is 0, the result is
placed in the W register. If ’d’ is 1, the
result is placed back in register ’f’.
If the result is 0, the next instruction,
which is already fetched, is discarded.
A NOP is executed instead making it a
two-cycle instruction.
1
1(2)
Before Instruction
After Instruction
Inclusive OR Literal with W
[ label ]
0
(W) .OR. k
Z
The contents of the W register are
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
1
1
Before Instruction
After Instruction
HERE
CONTINUE •
IORLW
PIC16CE62X
00
11
PC
CNT
if CNT=
PC
if CNT
PC
f
k
[0,1]
127
255
W
W
Z
(dest), skip if result = 0
INCFSZ f,d
IORLW k
=
=
=
=
1111
1000
0x35
INCFSZ
GOTO
•
•
=
=
=
(W)
address HERE
CNT + 1
0,
address CONTINUE
0,
address HERE +1
DS40182C-page 71
0x9A
0xBF
1
dfff
kkkk
LOOP
CNT,
ffff
kkkk
1