PIC18F65J10-I/PT Microchip Technology, PIC18F65J10-I/PT Datasheet - Page 190

• Manufacturer Part Number: PIC18F65J10-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10 FAMILY
18.4.6
In half-bridge applications, where all power switches
are modulated at the PWM frequency at all times, the
power switches normally require more time to turn off
than to turn on. If both the upper and lower power
switches are switched at the same time (one turned on
and the other turned off), both switches may be on for
a short period of time until one switch completely turns
off. During this brief interval, a very high current
(shoot-through current) may flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from flow-
ing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In the Half-Bridge Output mode, a digitally program-
mable dead-band delay is available to avoid
shoot-through current from destroying the bridge
power switches. The delay occurs at the signal
transition from the non-active state to the active state.
See Figure 18-4 for illustration. The lower seven bits of
the ECCP1DEL register (Register 18-2) set the delay
period in terms of microcontroller instruction cycles
(T
18.4.7
When the ECCP1 is programmed for any of the
Enhanced PWM modes, the active output pins may be
configured for auto-shutdown. Auto-shutdown immedi-
ately places the Enhanced PWM output pins into a
defined shutdown state when a shutdown event
occurs.
REGISTER 18-2:
DS39663F-page 188
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
CY
PxRSEN
R/W-0
or 4 T
OSC
PROGRAMMABLE DEAD-BAND
DELAY
ENHANCED PWM
AUTO-SHUTDOWN
).
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPxASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPxASE must be cleared in software to restart the PWM
PxDC<6:0>: PWM Delay Count bits
Delay time, in number of F
signal to transition to active.
PxDC6
R/W-0
away; the PWM restarts automatically
ECCPxDEL: PWM DEAD-BAND DELAY REGISTER
W = Writable bit
‘1’ = Bit is set
PxDC5
R/W-0
OSC
/4 (4 * T
PxDC4
R/W-0
OSC
) cycles, between the scheduled and actual time for a PWM
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PxDC3
R/W-0
A shutdown event can be caused by either of the two
comparator modules or the FLT0 pin (or any combination
of these three sources). The comparators may be used
to monitor a voltage input proportional to a current being
monitored in the bridge circuit. If the voltage exceeds a
threshold, the comparator switches state and triggers a
shutdown. Alternatively, a low-level digital signal on the
FLT0
auto-shutdown feature can be disabled by not selecting
any auto-shutdown sources. The auto-shutdown sources
to be used are selected using the ECCP1AS<2:0> bits
(bits<6:4> of the ECCP1AS register).
When a shutdown occurs, the output pins are
asynchronously placed in their shutdown states,
specified by the PSS1AC<1:0> and PSS1BD<1:0> bits
(ECCP1AS<3:0>). Each pin pair (P1A/P1C and P1B/
P1D) may be set to drive high, drive low or be tri-stated
(not driving). The ECCP1ASE bit (ECCP1AS<7>) is
also set to hold the Enhanced PWM outputs in their
shutdown states.
The ECCP1ASE bit is set by hardware when a
shutdown event occurs. If automatic restarts are not
enabled, the ECCP1ASE bit is cleared by firmware
when the cause of the shutdown clears. If automatic
restarts are enabled, the ECCP1ASE bit is automati-
cally cleared when the cause of the auto-shutdown has
cleared.
If the ECCP1ASE bit is set when a PWM period begins,
the PWM outputs remain in their shutdown state for that
entire PWM period. When the ECCP1ASE bit is
cleared, the PWM outputs will return to normal
operation at the beginning of the next PWM period.
Note:
pin
Writing to the ECCP1ASE bit is disabled
while a shutdown condition is active.
can
PxDC2
R/W-0
also
© 2009 Microchip Technology Inc.
trigger
x = Bit is unknown
PxDC1
R/W-0
a
shutdown.
PxDC0
R/W-0
bit 0
The