PIC18LF25J11-I/ML Microchip Technology, PIC18LF25J11-I/ML Datasheet - Page 177
![IC PIC MCU FLASH 32K 2V 28-QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC18LF25J11-I/ML
Manufacturer Part Number
PIC18LF25J11-I/ML
Description
IC PIC MCU FLASH 32K 2V 28-QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18LF25J11-I/ML
Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM183022, DM183032, DV164136, MA180023
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
A/d Bit Size
10 bit
A/d Channels Available
10
Height
0.88 mm
Length
6 mm
Supply Voltage (max)
2.75 V, 3.6 V
Supply Voltage (min)
2 V
Width
6 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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10.2.5
In the Addressable Parallel Slave Port mode
(
two extra inputs, PMA<1:0>, which are the address
lines 1 and 0. This makes the 4-byte buffer space
directly addressable as fixed pairs of read and write
buffers. As with Legacy Buffered mode, data is output
from PMDOUT1L, PMDOUT1H, PMDOUT2L and
PMDOUT2H, and is read in on PMDIN1L, PMDIN1H,
PMDIN2L and PMDIN2H. Table 10-1 provides the
buffer addressing for the incoming address to the input
and output registers.
FIGURE 10-6:
10.2.5.1
When chip select is active and a read strobe occurs
(PMCS = 1 and PMRD = 1), the data from one of the
four output bytes is presented onto PMD<7:0>. Which
byte is read depends on the 2-bit address placed on
ADDR<1:0>. Table 10-1 provides the corresponding
FIGURE 10-7:
© 2009 Microchip Technology Inc.
PMMODEH<1:0> = 01), the module is configured with
PMD<7:0>
PMA<1:0>
PMWR
Master
PMPIF
PMD<7:0>
PMA<1:0>
PMRD
PMCS
OBE
ADDRESSABLE PARALLEL SLAVE
PORT MODE
PMCS1
PMWR
PMRD
READ FROM SLAVE PORT
Address Bus
Data Bus
Control Lines
PARALLEL MASTER/SLAVE CONNECTION ADDRESSED BUFFER EXAMPLE
PARALLEL SLAVE PORT READ WAVEFORMS
PMD<7:0>
PMA<1:0>
PMCS
PMRD
PMWR
PIC18F46J11 FAMILY
TABLE 10-1:
output registers and their associated address. When an
output buffer is read, the corresponding OBxE bit is set.
The OBxE flag bit is set when all the buffers are empty.
If any buffer is already empty, OBxE = 1, the next read
to that buffer will generate an OBUF event.
Address
Decode
Write
PMA<1:0>
00
01
10
11
PIC18F Slave
PMDOUT1L (0)
PMDOUT1H (1)
PMDOUT2H (3)
PMDOUT2L (2)
|
Q4
SLAVE MODE BUFFER
ADDRESSING
PMDOUT2H((3)
PMDOUT1H (1)
PMDOUT1L (0)
PMDOUT2L (2)
|
Register
Q1
(Buffer)
Output
Address
Decode
Read
|
Q2
PMDIN1H (1)
PMDIN2H (3)
PMDIN1L (0)
PMDIN2L (2)
|
DS39932C-page 177
Q3
Input Register
PMDIN1H (1)
PMDIN2H (3)
PMDIN1L (0)
PMDIN2L (2)
(Buffer)
|
Q4
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