PIC18LF26J11-I/SS Microchip Technology, PIC18LF26J11-I/SS Datasheet - Page 19
![IC PIC MCU FLASH 64K 2V 28-SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18LF26J11-I/SS
Manufacturer Part Number
PIC18LF26J11-I/SS
Description
IC PIC MCU FLASH 64K 2V 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.MA180023.pdf
(528 pages)
2.PIC18LF24J10-ISS.pdf
(32 pages)
3.PIC18F24J11-ISS.pdf
(14 pages)
Specifications of PIC18LF26J11-I/SS
Program Memory Type
FLASH
Program Memory Size
64KB (32K x 16)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3776 B
Interface Type
EUSART, I2C, SPI
Maximum Clock Frequency
31 KHz
Number Of Programmable I/os
16
Number Of Timers
5
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183032, MA180023, DM183022
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
A/d Bit Size
10 bit
A/d Channels Available
10
Height
1.75 mm
Length
10.2 mm
Supply Voltage (max)
2.75 V, 3.6 V
Supply Voltage (min)
2 V
Width
5.3 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 5-3:
© 2009 Microchip Technology Inc.
DEBUG
XINST
STVREN
WDTEN
CP0
IESO
FCMEN
FOSC2
FOSC<1:0>
WDTPS<3:0>
CCP2MX
Bit Name
PIC18F45J10 FAMILY DEVICES: BIT DESCRIPTIONS
Configuration
CONFIG1H
CONFIG2H
CONFIG3H
CONFIG1L
CONFIG1L
CONFIG1L
CONFIG1L
CONFIG2L
CONFIG2L
CONFIG2L
CONFIG2L
Words
Background Debugger Enable bit
1 = Background debugger disabled, RB6 and RB7 configured as general
0 = Background debugger enabled, RB6 and RB7 are dedicated to in-circuit debug
Extended Instruction Set Enable bit
1 = Instruction set extension and Indexed Addressing mode enabled
0 = Instruction set extension and Indexed Addressing mode disabled
Stack Overflow/Underflow Reset Enable bit
1 = Reset on stack overflow/underflow enabled
0 = Reset on stack overflow/underflow disabled
Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled (control is placed on SWDTEN bit)
Code Protection bit
1 = Program memory is not code-protected
0 = Program memory is code-protected
Internal/External Oscillator Switchover bit
1 = Oscillator Switchover mode enabled
0 = Oscillator Switchover mode disabled
Fail-Safe Clock Monitor Enable bit
1 = Fail-Safe Clock Monitor enabled
0 = Fail-Safe Clock Monitor disabled
Default Oscillator Select bit
1 = Clock designated by FOSC<1:0> is enabled as system clock when
0 = INTRC is enabled as system clock when OSCCON<1:0> = 00
Primary Oscillator Select bits
11 = EC oscillator, PLL enabled and under software control, CLKO function on OSC2
10 = EC oscillator, CLKO function on OSC2
01 = HS oscillator, PLL enabled and under software control
00 = HS oscillator
Watchdog Timer Postscale Select bits
1111 = 1:32,768
1110 = 1:16,384
1101 = 1:8,192
1100 = 1:4,096
1011 = 1:2,048
1010 = 1:1,024
1001 = 1:512
1000 = 1:256
0111 = 1:128
0110 = 1:64
0101 = 1:32
0100 = 1:16
0011 = 1:8
0010 = 1:4
0001 = 1:2
0000 = 1:1
CCP2 MUX bit
1 = CCP2 is multiplexed with RC1
0 = CCP2 is multiplexed with RB3
PIC18F2XJXX/4XJXX FAMILY
purpose I/O pins
(Legacy mode)
OSCCON<1:0> = 00
Description
DS39687E-page 19