PIC16F73T-E/SO Microchip Technology, PIC16F73T-E/SO Datasheet - Page 55

IC MCU FLASH 4KX14 A/D 28SOIC

PIC16F73T-E/SO

Manufacturer Part Number
PIC16F73T-E/SO
Description
IC MCU FLASH 4KX14 A/D 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F73T-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16F73TE/SO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16F73T-E/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
8.0
Each Capture/Compare/PWM (CCP) module contains
a 16-bit register which can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Both the CCP1 and CCP2 modules are identical in
operation, with the exception being the operation of the
special event trigger. Table 8-1 and Table 8-2 show the
resources and interactions of the CCP module(s). In
the following sections, the operation of a CCP module
is described with respect to CCP1. CCP2 operates the
same as CCP1, except where noted.
8.1
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match and will clear both
TMR1H and TMR1L registers.
TABLE 8-2:
 2002 Microchip Technology Inc.
CCPx Mode CCPy Mode
Capture
Capture
Compare
PWM
PWM
PWM
CAPTURE/COMPARE/PWM
MODULES
CCP1 Module
Capture
Compare
Compare
PWM
Capture
Compare
INTERACTION OF TWO CCP MODULES
Same TMR1 time-base.
Same TMR1 time-base.
Same TMR1 time-base.
The PWMs will have the same frequency and update rate (TMR2 interrupt).
The rising edges are aligned.
None.
None.
8.2
Capture/Compare/PWM Register1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP2CON register controls
the operation of CCP2. The special event trigger is
generated by a compare match; it will clear both
TMR1H and TMR1L registers, and start an A/D conver-
sion (if the A/D module is enabled).
Additional information on CCP modules is available in
the PICmicro™ Mid-Range MCU Family Reference
Manual (DS33023) and in Application Note AN594,
“Using the CCP Modules” (DS00594).
TABLE 8-1:
Interaction
CCP Mode
CCP2 Module
Compare
Capture
PWM
CCP MODE - TIMER
RESOURCES REQUIRED
PIC16F7X
Timer Resource
DS30325B-page 53
Timer1
Timer1
Timer2

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