DSPIC33FJ16GS404-E/ML Microchip Technology, DSPIC33FJ16GS404-E/ML Datasheet - Page 259
![IC DSPIC MCU/DSP 16K 44-QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
DSPIC33FJ16GS404-E/ML
Manufacturer Part Number
DSPIC33FJ16GS404-E/ML
Description
IC DSPIC MCU/DSP 16K 44-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS404-E/ML
Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
44-QFN
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
35
Data Ram Size
2 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ16GS404-E/ML
Manufacturer:
Microchip Technology
Quantity:
135
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 259 of 346
- Download datasheet (6Mb)
REGISTER 19-8:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
Note 1: This register is only implemented on the dsPIC33FJ16GS502 and dsPIC33FJ16GS504 devices.
IRQEN6
R/W-0
U-0
—
2: If other conversions are in progress, conversion will be performed when the conversion resources are
available.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Unimplemented: Read as ‘0’
IRQEN6: Interrupt Request Enable 6 bit
1 = Enable IRQ generation when requested conversion of channels AN13 and AN12 is completed
0 = IRQ is not generated
PEND6: Pending Conversion Status 6 bit
1 = Conversion of channels AN13 and AN 12 is pending; set when selected trigger is asserted
0 = Conversion is complete
SWTRG6: Software Trigger 6 bit
1 = Start conversion of AN13 (INTREF) and AN12 (EXTREF) (if selected by TRGSRC bits)
This bit is automatically cleared by hardware when the PEND6 bit is set.
0 = Conversion is not started
PEND6
R/W-0
U-0
—
ADCPC3: A/D CONVERT PAIR CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
SWTRG6
R/W-0
U-0
—
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
—
TRGSRC6<4:0>
R/W-0
U-0
—
(1)
x = Bit is unknown
R/W-0
U-0
—
DS70318D-page 257
(2)
R/W-0
U-0
—
bit 8
bit 0
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