PIC16C72A-04I/SS Microchip Technology, PIC16C72A-04I/SS Datasheet - Page 55
![IC MCU OTP 2KX14 A/D PWM 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16C72A-04I/SS
Manufacturer Part Number
PIC16C72A-04I/SS
Description
IC MCU OTP 2KX14 A/D PWM 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C62B-04SO.pdf
(120 pages)
4.PIC16C72A-04SP.pdf
(6 pages)
Specifications of PIC16C72A-04I/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
For Use With
309-1025 - ADAPTER 28-SSOP TO 28-DIP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
10.0
The PIC16C62B/72A devices have a host of features
intended to maximize system reliability, minimize cost
through elimination of external components, provide
power saving operating modes and offer code protec-
tion. These are:
• Oscillator Mode Selection
• Reset
• Interrupts
• Watchdog Timer (WDT)
• SLEEP
• Code protection
• ID locations
• In-circuit serial programming™ (ICSP)
These devices have a Watchdog Timer, which can be
shut off only through configuration bits. It runs off its
own RC oscillator for added reliability. There are two
timers that offer necessary delays on power-up. One is
the Oscillator Start-up Timer (OST), intended to keep
the chip in reset until the crystal oscillator is stable. The
FIGURE 10-1: CONFIGURATION WORD
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
1999 Microchip Technology Inc.
bit13
bit 13-8
bit 7:
bit 6:
bit 3:
bit 2:
bit 1-0:
Note 1: Enabling Brown-out Reset automatically enables Power-up Timer (PWRT), regardless of the value of bit PWRTE.
CP1
5-4:
SPECIAL FEATURES OF THE
CPU
CP0
All of the CP1:CP0 pairs must be given the same value to enable the code protection scheme listed.
CP1:CP0: Code Protection bits
11 = Code protection off
10 = Upper half of program memory code protected
01 = Upper 3/4th of program memory code protected
00 = All memory is code protected
Unimplemented: Read as ’1’
BODEN: Brown-out Reset Enable bit
1 = BOR enabled
0 = BOR disabled
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC1:FOSC0: Oscillator Selection bits
11 = RC oscillator
10 = HS oscillator
01 = XT oscillator
00 = LP oscillator
CP1
CP0
CP1
CP0
—
(2)
BODEN
(1)
(1)
CP1
Preliminary
CP0
PWRTE
other is the Power-up Timer (PWRT), which provides a
fixed delay on power-up only and is designed to keep
the part in reset while the power supply stabilizes. With
these two timers on-chip, most applications need no
external reset circuitry.
SLEEP mode is designed to offer a very low current
power-down mode. The user can wake-up from SLEEP
through external reset, Watchdog Timer Wake-up, or
through an interrupt. Several oscillator options are also
made available to allow the part to fit the application.
The RC oscillator option saves system cost while the
LP crystal option saves power. A set of configuration
bits are used to select various options.
Additional information on special features is available in
the
(DS33023).
10.1
The configuration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device configurations. These bits are mapped in pro-
gram memory location 2007h.
The user will note that address 2007h is beyond the
user program memory space. In fact, it belongs to the
special test/configuration memory space (2000h -
3FFFh), which can be accessed only during program-
ming.
PICmicro™
WDTE
Configuration Bits
PIC16C62B/72A
FOSC1
Mid-Range
FOSC0
bit0
Register:
Address:
Reference
DS35008B-page 55
CONFIG
2007h
Manual,