PIC16F628-20/SS Microchip Technology, PIC16F628-20/SS Datasheet - Page 100

IC MCU FLASH 2KX14 COMP 20SSOP

PIC16F628-20/SS

Manufacturer Part Number
PIC16F628-20/SS
Description
IC MCU FLASH 2KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet

Specifications of PIC16F628-20/SS

Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164307 - MODULE SKT FOR PM3 28SSOPAC164018 - MODULE SKT PROMATEII 20SSOP
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PIC16F62X
TABLE 14-7:
TABLE 14-8:
DS40300C-page 98
Power-on Reset
MCLR Reset during normal operation
MCLR Reset during SLEEP
WDT Reset
WDT Wake-up
Brown-out Detect Reset
Interrupt Wake-up from SLEEP
Legend: u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’.
Note 1: When the wake-up is due to an interrupt and global enable bit, GIE is set, the PC is loaded with the interrupt vector
W
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
T1CON
T2CON
CCP1CON
RCSTA
CMCON
PCLATH
INTCON
PIR1
OPTION
TRISA
TRISB
PIE1
PCON
TXSTA
EECON1
VRCON
Legend:
Note
Register
1: If V
2: One or more bits in INTCON, PIR1 and/or PIR2 will be affected (to cause wake-up).
3: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
4: See Table 14-7 for RESET value for specific condition.
5: If wake-up was due to comparator input changing, then Bit 6 = 1. All other interrupts generating a wake-up will cause Bit 6 = u.
6: If RESET was due to brown-out, then Bit 0 = 0. All other RESETS will cause Bit 0 = u.
u = unchanged, x = unknown, - = unimplemented bit, reads as ‘0’, q = value depends on condition.
(0004h) after execution of PC+1.
DD
Address
goes too low, Power-on Reset will be activated and registers will be affected differently.
Condition
INITIALIZATION CONDITION FOR SPECIAL REGISTERS
INITIALIZATION CONDITION FOR REGISTERS
0Ah
0Bh
0Ch
8Ch
8Eh
9Ch
00h
01h
02h
03h
04h
05h
06h
10h
12h
17h
18h
1Fh
81h
85h
86h
98h
9Fh
xxxx xxxx
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
xxxx 0000
xxxx xxxx
--00 0000
-000 0000
--00 0000
0000 -00x
0000 0000
---0 0000
0000 000x
0000 -000
1111 1111
11-1 1111
1111 1111
0000 -000
---- 1-0x
0000 -010
---- x000
000- 0000
Power-on
Reset
• MCLR Reset during normal
• MCLR Reset during SLEEP
• WDT Reset
• Brown-out Detect Reset
operation
Preliminary
Program
PC + 1
Counter
PC + 1
000h
000h
000h
000h
000h
---- 1-uq
000q quuu
uuuu uuuu
uuuu uuuu
0000 0000
uuuu uuuu
xxxx u000
uuuu uuuu
--uu uuuu
-000 0000
--00 0000
0000 -00x
0000 0000
---0 0000
0000 000u
0000 -000
1111 1111
11-- 1111
1111 1111
0000 -000
0000 -010
---- q000
000- 0000
(1)
(1,6)
(4)
(1)
0001 1xxx
000u uuuu
0001 0uuu
0000 uuuu
uuu0 0uuu
000x xuuu
uuu1 0uuu
Register
STATUS
• Wake-up from SLEEP through
• Wake-up from SLEEP through
interrupt
WDT timeout
 2003 Microchip Technology Inc.
-q-- ----
uuuq quuu
uuuu uqqq
uuuu uuuu
uuuu uuuu
uuuu uuuu
xxxx 0000
uuuu uuuu
--uu uuuu
-uuu uuuu
--uu uuuu
uuuu -uuu
uu-- uuuu
---u uuuu
uuuu uuuu
uu-u uuuu
uuuu uuuu
uuuu -uuu
---- --uu
uuuu -uuu
---- uuuu
uuu- uuuu
PC + 1
---- 1-0x
---- 1-uu
---- 1-uu
---- 1-uu
---- u-uu
---- 1-u0
---- u-uu
Register
(3)
PCON
(2,5)
(4)
(2)

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