PIC18LF2221-I/SS Microchip Technology, PIC18LF2221-I/SS Datasheet - Page 162
![IC PIC MCU FLASH 2KX16 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC18LF2221-I/SS
Manufacturer Part Number
PIC18LF2221-I/SS
Description
IC PIC MCU FLASH 2KX16 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F2221-ISO.pdf
(402 pages)
2.PIC18F2221-ISO.pdf
(8 pages)
3.PIC18F2221-ISO.pdf
(30 pages)
4.PIC18F2221-ISO.pdf
(46 pages)
5.PIC18LF2221-IML.pdf
(394 pages)
Specifications of PIC18LF2221-I/SS
Core Size
8-Bit
Program Memory Size
4KB (2K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
512Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF2221-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC18F2221-ISO PDF datasheet
- PIC18F2221-ISO PDF datasheet #2
- PIC18F2221-ISO PDF datasheet #3
- PIC18F2221-ISO PDF datasheet #4
- PIC18LF2221-IML PDF datasheet #5
- Current page: 162 of 402
- Download datasheet (7Mb)
current from destroying the bridge power switches. The
PIC18F2221/2321/4221/4321 FAMILY
17.4.6
In half-bridge applications, where all power switches
are modulated at the PWM frequency at all times, the
power switches normally require more time to turn off
than to turn on. If both the upper and lower power
switches are switched at the same time (one turned on
and the other turned off), both switches may be on for
a short period of time until one switch completely turns
off. During this brief interval, a very high current (shoot-
through current) may flow through both power
switches, shorting the bridge supply. To avoid this
potentially destructive shoot-through current from
flowing during switching, turning on either of the power
switches is normally delayed to allow the other switch
to completely turn off.
In the Half-Bridge Output mode, a digitally programmable
dead-band delay is available to avoid shoot-through
delay occurs at the signal transition from the nonactive
state to the active state (see Figure 17-4 for illustra-
tion). Bits PDC<6:0> of the ECCP1DEL register
(Register 17-2) set the delay period in terms of micro-
controller instruction cycles (T
are not available on 28-pin devices as the standard
CCP module does not support half-bridge operation.
17.4.7
When the ECCP1 is programmed for any of the
Enhanced PWM modes, the active output pins may be
configured for auto-shutdown. Auto-shutdown immedi-
ately places the Enhanced PWM output pins into a
defined shutdown state when a shutdown event occurs.
REGISTER 17-2:
DS39689F-page 162
Note:
bit 7
bit 6-0
PROGRAMMABLE DEAD-BAND
DELAY
Programmable dead-band delay is not
implemented in 28-pin devices with
standard CCP modules.
ENHANCED PWM AUTO-SHUTDOWN
ECCP1DEL: PWM DEAD-BAND DELAY REGISTER
bit 7
PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event
0 = Upon auto-shutdown, ECCPASE must be cleared in software to restart the PWM
PDC<6:0>: PWM Delay Count bits
Delay time, in number of F
a PWM signal to transition to active.
Legend:
R = Readable bit
-n = Value at POR
PRSEN
R/W-0
Note 1: Unimplemented on 28-pin devices; bits read ‘0’.
goes away; the PWM restarts automatically
CY
or 4 T
PDC6
R/W-0
OSC
). These bits
(1)
PDC5
R/W-0
OSC
W = Writable bit
‘1’ = Bit is set
/4 (4 * T
(1)
(1)
PDC4
R/W-0
OSC
A shutdown event can be caused by either of the
comparator modules, a low level on the Fault input pin
(FLT0) or any combination of these three sources. The
comparators may be used to monitor a voltage input
proportional to a current being monitored in the bridge
circuit. If the voltage exceeds a threshold, the
comparator switches state and triggers a shutdown.
Alternatively, a low digital signal on FLT0 can also trigger
a shutdown. The auto-shutdown feature can be disabled
by not selecting any auto-shutdown sources. The auto-
shutdown sources to be used are selected using the
ECCPAS<2:0> bits (ECCP1AS<6:4>).
When a shutdown occurs, the output pins are asyn-
chronously placed in their shutdown states, specified
by
(ECCP1AS<3:0>). Each pin pair (P1A/P1C and P1B/
P1D) may be set to drive high, drive low or be tri-stated
(not driving). The ECCPASE bit (ECCP1AS<7>) is also
set to hold the Enhanced PWM outputs in their
shutdown states.
The ECCPASE bit is set by hardware when a shutdown
event occurs. If automatic restarts are not enabled, the
ECCPASE bit is cleared by firmware when the cause of
the shutdown clears. If automatic restarts are enabled,
the ECCPASE bit is automatically cleared when the
cause of the auto-shutdown has cleared.
If the ECCPASE bit is set when a PWM period begins,
the PWM outputs remain in their shutdown state for that
entire PWM period. When the ECCPASE bit is cleared,
the PWM outputs will return to normal operation at the
beginning of the next PWM period.
) cycles, between the scheduled and actual time for
Note:
(1)
the
PDC3
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PSSAC<1:0>
Writing to the ECCPASE bit is disabled
while a shutdown condition is active.
(1)
PDC2
R/W-0
© 2009 Microchip Technology Inc.
(1)
and
x = Bit is unknown
PDC1
R/W-0
PSSBD<1:0>
(1)
PDC0
R/W-0
bit 0
(1)
bits
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