PIC16F83-04/P Microchip Technology, PIC16F83-04/P Datasheet - Page 64
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PIC16F83-04/P
Manufacturer Part Number
PIC16F83-04/P
Description
IC MCU FLASH 512X14 EE 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16LF84A-04P.pdf
(125 pages)
3.PIC16LF83-04P.pdf
(4 pages)
Specifications of PIC16F83-04/P
Core Size
8-Bit
Program Memory Size
896B (512 x 14)
Oscillator Type
External
Core Processor
PIC
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Operating Temperature
0°C ~ 70°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16F
No. Of I/o's
13
Eeprom Memory Size
64Byte
Ram Memory Size
36Byte
Cpu Speed
4MHz
No. Of
RoHS Compliant
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
36 B
Maximum Clock Frequency
10 MHz
Number Of Programmable I/os
13
Number Of Timers
1
Operating Supply Voltage
2 V to 6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
0 C
Data Rom Size
64 B
Height
3.3 mm
Length
22.86 mm
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Width
6.35 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Details
PIC16F8X
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
DS30430C-page 64
Inclusive OR W with f
[ label ]
0
d
(W) .OR. (f)
Z
Inclusive OR the W register with regis-
ter ’f’. If ’d’ is 0 the result is placed in the
W register. If ’d’ is 1 the result is placed
back in register ’f’.
1
1
Before Instruction
After Instruction
Move f
[ label ]
0
d
(f)
Z
The contents of register f is moved to a
destination dependant upon the status
of d. If d = 0, destination is W register. If
d = 1, the destination is file register f
itself. d = 1 is useful to test a file regis-
ter since status flag Z is affected.
1
1
After Instruction
IORWF
MOVF
Decode
Decode
Q1
Q1
00
00
f
f
[0,1]
[0,1]
(destination)
127
127
RESULT =
W
RESULT =
W
Z
W = value in FSR register
Z = 1
IORWF
MOVF f,d
register
register
0100
1000
FSR, 0
Read
Read
Q2
Q2
’f’
’f’
(destination)
RESULT, 0
=
=
=
Process
Process
dfff
dfff
f,d
data
data
Q3
Q3
0x13
0x91
0x13
0x93
1
destination
destination
ffff
ffff
Write to
Write to
Q4
Q4
MOVLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
MOVWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example
Move Literal to W
[ label ]
0
k
None
The eight bit literal ’k’ is loaded into W
register
as 0’s.
1
1
After Instruction
Move W to f
[ label ]
0
(W)
None
Move data from W register to register
'f'
1
1
Before Instruction
After Instruction
.
MOVLW
MOVWF
Decode
Decode
Q1
Q1
11
00
k
f
(W)
.
1998 Microchip Technology Inc.
127
(f)
255
The don’t cares will assemble
W
OPTION =
W
OPTION =
W
MOVLW k
MOVWF
literal ’k’
register
00xx
0000
0x5A
Read
Read
Q2
Q2
OPTION_REG
’f’
=
0x5A
=
=
kkkk
Process
1fff
Process
data
data
Q3
Q3
f
0xFF
0x4F
0x4F
0x4F
register ’f’
Write to
kkkk
ffff
Write
Q4
Q4
W