PIC16C558-20/SS Microchip Technology, PIC16C558-20/SS Datasheet - Page 21
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PIC16C558-20/SS
Manufacturer Part Number
PIC16C558-20/SS
Description
IC MCU OTP 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C558-20/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
Q575787
4.2.2.3
The INTCON register is a readable and writable
register which contains the various enable and flag bits
for all interrupt sources.
REGISTER 4-3:
2002 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
INTCON Register
GIE: Global Interrupt Enable bit
1 = Enables all un-masked interrupts
0 = Disables all interrupts
Reserved: For future use. Always maintain this bit clear.
T0IE: TMR0 Overflow Interrupt Enable bit
1 = Enables the TMR0 interrupt
0 = Disables the TMR0 interrupt
INTE: RB0/INT External Interrupt Enable bit
1 = Enables the RB0/INT external interrupt
0 = Disables the RB0/INT external interrupt
RBIE: RB Port Change Interrupt Enable bit
1 = Enables the RB port change interrupt
0 = Disables the RB port change interrupt
T0IF: TMR0 Overflow Interrupt Flag bit
1 = TMR0 register has overflowed (must be cleared in software)
0 = TMR0 register did not overflow
INTF: RB0/INT External Interrupt Flag bit
1 = The RB0/INT external interrupt occurred (must be cleared in software)
0 = The RB0/INT external interrupt did not occur
RBIF: RB Port Change Interrupt Flag bit
1 = When at least one of the RB7:RB4 pins changed state (must be cleared in software)
0 = None of the RB7:RB4 pins have changed state
Legend:
R = Readable bit
- n = Value at POR reset
bit7
INTCON REGISTER (ADDRESS 0BH OR 8BH)
R/W-0
GIE
Reserved
—
R/W-0
T0IE
W = Writable bit
’1’ = Bit is set
Preliminary
R/W-0
INTE
Note:
R/W-0
RBIE
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
Interrupt flag bits get set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit or the global
enable bit, GIE (INTCON<7>).
R/W-0
T0IF
PIC16C55X
x = Bit is unknown
R/W-0
INTF
DS40143D-page 19
R/W-x
RBIF
bit0