ATMEGA16L-8AUR Atmel, ATMEGA16L-8AUR Datasheet - Page 271
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ATMEGA16L-8AUR
Manufacturer Part Number
ATMEGA16L-8AUR
Description
MCU AVR 16KB FLASH 16MHZ 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16L-8MI.pdf
(357 pages)
Specifications of ATMEGA16L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Reading the Signature
Bytes
Reading the
Calibration Byte
Parallel Programming
Characteristics
2466T–AVR–07/10
Figure 132. Mapping between BS1, BS2 and the Fuse- and Lock Bits during Read
The algorithm for reading the Signature bytes is as follows (refer to
page 266
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte ($00 - $02).
3. Set OE to “0”, and BS1 to “0”. The selected Signature byte can now be read at DATA.
4. Set OE to “1”.
The algorithm for reading the Calibration byte is as follows (refer to
page 266
1. A: Load Command “0000 1000”.
2. B: Load Address Low Byte, $00.
3. Set OE to “0”, and BS1 to “1”. The Calibration byte can now be read at DATA.
4. Set OE to “1”.
Figure 133. Parallel Programming Timing, Including some General Timing Requirements
(DATA, XA0/1, BS1, BS2)
for details on Command and Address loading):
for details on Command and Address loading):
Data & Contol
RDY/BSY
PAGEL
XTAL1
Fuse High Byte
Fuse Low Byte
WR
Lock Bits
BS2
t
t
BVPH
DVXH
t
t
XHXL
PHPL
0
1
t
t
t
t
XLDX
PLBX
XLWL
PLWL
t
BVWL
BS1
t
WL WH
WLRL
0
1
“Programming the Flash” on
“Programming the Flash” on
ATmega16(L)
DATA
t
WLBX
t
WLRH
271
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