PIC24FJ32GA102-I/SO Microchip Technology, PIC24FJ32GA102-I/SO Datasheet - Page 292

• Manufacturer Part Number: PIC24FJ32GA102-I/SO
• Description: IC MCU 16BIT 32KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24FJ32GA102-I/SO

• Program Memory Type: FLASH
• Program Memory Size: 32KB (11K x 24)
• Package / Case: 28-SOIC (7.5mm Width)
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24FJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001, MA240020, DM240002, DM240011, DV164033
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FJ64GA104 FAMILY
CRC
CTMU
Customer Change Notification Service ............................. 295
Customer Notification Service........................................... 295
Customer Support ............................................................. 295
D
Data Memory
DC Characteristics
Deep Sleep Watchdog Timer (DSWDT) ........................... 244
Development Support ....................................................... 247
DISVREG Pin.................................................................... 242
Doze Mode........................................................................ 115
E
Electrical Characteristics
Equations
Errata .................................................................................... 6
Examples
F
Flash Configuration Words.................................. 28, 235–240
Flash Program Memory....................................................... 47
DS39951B-page 290
Registers ................................................................... 211
Typical Operation ...................................................... 211
User Interface ........................................................... 210
Measuring Capacitance ............................................ 231
Measuring Time ........................................................ 232
Pulse Generation and Delay ..................................... 232
Address Space............................................................ 29
Memory Map ............................................................... 29
Near Data Space ........................................................ 30
SFR Space.................................................................. 30
Software Stack ............................................................ 43
Space Organization .................................................... 30
Comparator Specifications ........................................ 269
Comparator Voltage Reference ................................ 269
I/O Pin Input Specifications ....................................... 267
I/O Pin Output Specifications .................................... 268
Idle Current ............................................................... 263
Internal Voltage Regulator ........................................ 269
Operating Current ..................................................... 262
Power-Down Base Current ....................................... 264
Power-Down Peripheral Module Current (I
Program Memory ...................................................... 268
Temperature and Voltage Specifications .................. 261
Absolute Maximum Ratings ...................................... 259
Thermal Conditions ................................................... 260
Thermal Packaging ................................................... 260
V/F Graph ................................................................. 260
A/D Conversion Clock Period ................................... 223
Baud Rate Reload Calculation .................................. 173
Calculating the PWM Period ..................................... 155
Calculation for Maximum PWM Resolution............... 155
Relationship Between Device and
UART Baud Rate with BRGH = 0 ............................. 180
UART Baud Rate with BRGH = 1 ............................. 180
Baud Rate Error Calculation (BRGH = 0) ................. 180
and Table Instructions................................................. 47
Enhanced ICSP Operation.......................................... 48
JTAG Operation .......................................................... 48
Programming Algorithm .............................................. 50
RTSP Operation.......................................................... 48
Single-Word Programming.......................................... 53
Data .................................................................. 210
Polynomial ........................................................ 210
SPI Clock Speed............................................... 170
PD
) .......... 265
Preliminary
I
I/O Ports
I
Input Capture
Input Capture with Dedicated Timers ............................... 147
Instruction Set
Instruction-Based Power-Saving Modes........................... 107
Inter-Integrated Circuit. See I
Internet Address ............................................................... 295
Interrupt Vector Table (IVT) ................................................ 61
Interrupts
J
JTAG Interface.................................................................. 246
M
Microchip Internet Web Site.............................................. 295
MPLAB ASM30 Assembler, Linker, Librarian ................... 248
MPLAB Integrated Development Environment
MPLAB PM3 Device Programmer .................................... 250
MPLAB REAL ICE In-Circuit Emulator System ................ 249
MPLINK Object Linker/MPLIB Object Librarian ................ 248
N
Near Data Space ................................................................ 30
O
Oscillator Configuration
2
C
Analog Port Pins Configuration................................. 118
Input Change Notification ......................................... 119
Input Voltage Considerations.................................... 118
Open-Drain Configuration......................................... 118
Parallel (PIO) ............................................................ 117
Peripheral Pin Select ................................................ 119
Pull-ups and Pull-Downs........................................... 119
Clock Rates .............................................................. 173
Communicating as Master in a Single
Reserved Addresses ................................................ 173
Setting Baud Rate When Operating as
Slave Address Masking ............................................ 173
32-Bit Mode .............................................................. 148
Operations ................................................................ 148
Synchronous and Trigger Modes.............................. 147
Overview................................................................... 253
Summary .................................................................. 251
Symbols Used in Opcode Descriptions .................... 252
Deep Sleep ............................................................... 108
Idle ............................................................................ 108
Sleep ........................................................................ 107
and Reset Sequence .................................................. 61
Control and Status Registers...................................... 64
Implemented Vectors.................................................. 63
Setup and Service Procedures ................................... 95
Trap Vectors ............................................................... 62
Vector Table ............................................................... 62
Software ................................................................... 247
Bit Values for Clock Selection..................................... 98
Clock Switching ........................................................ 102
Control Registers ........................................................ 99
CPU Clocking Scheme ............................................... 98
Initial Configuration on POR ....................................... 98
Secondary Oscillator (SOSC) ................................... 104
Master Environment ......................................... 171
Bus Master ....................................................... 173
Sequence ......................................................... 103
© 2009 Microchip Technology Inc.
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C. ...................................... 171