PIC16F87-I/ML Microchip Technology, PIC16F87-I/ML Datasheet - Page 148

IC MCU FLASH 4KX14 EEPROM 28QFN

PIC16F87-I/ML

Manufacturer Part Number
PIC16F87-I/ML
Description
IC MCU FLASH 4KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F87-I/ML

Core Size
8-Bit
Program Memory Size
7KB (4K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNAC164322 - MODULE SOCKET MPLAB PM3 28/44QFNAC164033 - ADAPTER 28QFN TO 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
PICmicro MID-RANGE MCU FAMILY
9.4
DS31009A-page 9-8
Note 1: Port/Peripheral select signal selects between port data and peripheral output.
2: Peripheral OE (output enable) is only activated if peripheral select is active.
3: I/O pins have diode protection to V
Peripheral input
PORT/PERIPHERAL Select
Peripheral Data-out
Data Bus
Peripheral OE
PORTC and the TRISC Register
(2)
PORTC is an 8-bit bi-directional port. Each pin is individually configurable as an input or output
through the TRISC register. PORTC pins have Schmitt Trigger input buffers.
When enabling peripheral functions, care should be taken in defining TRIS bits for each PORTC
pin. Some peripherals override the TRIS bit to make a pin an output, while other peripherals over-
ride the TRIS bit to make a pin an input.
Example 9-3: Initializing PORTC
Figure 9-6: PORTC Block Diagram (Peripheral Output Override)
CLRF
CLRF
BSF
MOVLW
MOVWF
WR PORT
WR TRIS
(1)
RD PORT
RD TRIS
STATUS
PORTC
STATUS, RP0
0xCF
TRISC
TRIS Latch
Data Latch
D
D
CK
CK
DD
Q
Q
Q
Q
and V
; Bank0
; Initialize PORTC by clearing output
;
; Select Bank1
; Value used to initialize data direction
; PORTC<3:0> = inputs, PORTC<5:4> = outputs
;
SS
.
data latches
PORTC<7:6> = inputs
0
1
Q
EN
D
1997 Microchip Technology Inc.
V
V
P
N
SS
DD
RD PORT
Schmitt
Trigger
I/O pin

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