PIC16F84AT-20I/SO Microchip Technology, PIC16F84AT-20I/SO Datasheet - Page 4
![IC MCU FLASH 1KX14 EE 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC16F84AT-20I/SO
Manufacturer Part Number
PIC16F84AT-20I/SO
Description
IC MCU FLASH 1KX14 EE 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F688T-ISL.pdf
(688 pages)
2.PIC16F84A-04P.pdf
(88 pages)
3.PIC16F84A-04P.pdf
(6 pages)
Specifications of PIC16F84AT-20I/SO
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
68 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
For Use With
I3-DB16F84A - BOARD DAUGHTER ICEPIC3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
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SECTION 5. CPU AND ALU
SECTION 6. MEMORY ORGANIZATION
SECTION 7. DATA EEPROM
SECTION 8. INTERRUPTS
DS00097D-page iv
Introduction .......................................................................................................................................................5-2
General Instruction Format ...............................................................................................................................5-4
Central Processing Unit (CPU) .........................................................................................................................5-4
Instruction Clock ...............................................................................................................................................5-4
Arithmetic Logical Unit (ALU) ...........................................................................................................................5-5
STATUS Register .............................................................................................................................................5-6
OPTION_REG Register ...................................................................................................................................5-8
PCON Register .................................................................................................................................................5-9
Design Tips ....................................................................................................................................................5-10
Related Application Notes ..............................................................................................................................5-11
Revision History .............................................................................................................................................5-12
Introduction .......................................................................................................................................................6-2
Program Memory Organization ........................................................................................................................6-2
Data Memory Organization ..............................................................................................................................6-8
Initialization .....................................................................................................................................................6-14
Design Tips ....................................................................................................................................................6-16
Related Application Notes ..............................................................................................................................6-17
Revision History .............................................................................................................................................6-18
Introduction .......................................................................................................................................................7-2
Control Register ...............................................................................................................................................7-3
EEADR .............................................................................................................................................................7-4
EECON1 and EECON2 Registers ....................................................................................................................7-4
Reading the EEPROM Data Memory ...............................................................................................................7-5
Writing to the EEPROM Data Memory .............................................................................................................7-5
Write Verify .......................................................................................................................................................7-6
Protection Against Spurious Writes ..................................................................................................................7-7
Data EEPROM Operation During Code Protected Configuration ....................................................................7-7
Initialization .......................................................................................................................................................7-7
Design Tips ......................................................................................................................................................7-8
Related Application Notes ................................................................................................................................7-9
Revision History .............................................................................................................................................7-10
Introduction .......................................................................................................................................................8-2
Control Registers ..............................................................................................................................................8-5
Interrupt Latency ............................................................................................................................................8-10
INT and External Interrupts ............................................................................................................................8-10
Context Saving During Interrupts ...................................................................................................................8-11
Initialization .....................................................................................................................................................8-14
Design Tips ....................................................................................................................................................8-16
Related Application Notes ..............................................................................................................................8-17
Revision History .............................................................................................................................................8-18
Table of Contents
1997 Microchip Technology Inc.
M
PAGE
5-1
6-1
7-1
8-1
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