PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 56
![IC PIC MCU FLASH 4KX16 18SOIC](/photos/6/76/67656/150-18-soic_sml.jpg)
PIC18LF1330-I/SO
Manufacturer Part Number
PIC18LF1330-I/SO
Description
IC PIC MCU FLASH 4KX16 18SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.AC162078.pdf
(318 pages)
3.PIC18F1230-ISO.pdf
(6 pages)
4.PIC18F1230-ISO.pdf
(12 pages)
5.PIC18F1230-ISO.pdf
(4 pages)
6.PIC18F1230-IP.pdf
(312 pages)
Specifications of PIC18LF1330-I/SO
Core Size
8-Bit
Program Memory Size
8KB (4K x 16)
Oscillator Type
Internal
Core Processor
PIC
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Operating Temperature
-40°C ~ 85°C
Package / Case
18-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
256Byte
Cpu Speed
40MHz
No.
RoHS Compliant
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF1330-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- PIC16F616T-ISL PDF datasheet
- AC162078 PDF datasheet #2
- PIC18F1230-ISO PDF datasheet #3
- PIC18F1230-ISO PDF datasheet #4
- PIC18F1230-ISO PDF datasheet #5
- PIC18F1230-IP PDF datasheet #6
- Current page: 56 of 312
- Download datasheet (6Mb)
PIC18F1230/1330
5.3.4
The Special Function Registers (SFRs) are registers
used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are
implemented as static RAM. SFRs start at the top of
data memory (FFFh) and extend downward to occupy
the top half of Bank 15 (F80h to FFFh). A list of these
registers is given in Table 5-1 and Table 5-2.
TABLE 5-1:
DS39758C-page 54
Note 1:
Address
FEDh POSTDEC0
FECh
FFDh
FFCh
FEEh POSTINC0
FEBh
FEAh
FFEh
FFBh
FEFh
2:
FFFh
FFAh
FE9h
FE8h
FE7h
FE6h POSTINC1
FE5h POSTDEC1
FE4h
FE3h
FE2h
FE1h
FE0h
FF9h
FF8h
FF7h
FF6h
FF5h
FF4h
FF3h
FF2h
FF1h
FF0h
This is not a physical register.
Unimplemented registers are read as ‘0’.
SPECIAL FUNCTION REGISTERS
PREINC0
PREINC1
PLUSW0
PLUSW1
TBLPTRU
TBLPTRH
TBLPTRL
INTCON2
INTCON3
STKPTR
PCLATU
PCLATH
INTCON
INDF0
INDF1
TABLAT
PRODH
PRODL
FSR0H
FSR1H
FSR0L
WREG
FSR1L
SPECIAL FUNCTION REGISTER MAP FOR PIC18F1230/1330 DEVICES
Name
TOSU
TOSH
TOSL
BSR
PCL
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
Address
FDDh POSTDEC2
FDCh
FCDh
FCCh
FDFh
FDEh POSTINC2
FDBh
FDAh
FCFh
FCEh
FCBh
FCAh
FD9h
FD8h
FD7h
FD6h
FD5h
FD4h
FD3h
FD2h
FD1h
FD0h
FC9h
FC8h
FC7h
FC6h
FC5h
FC4h
FC3h
FC2h
FC1h
FC0h
Advance Information
PREINC2
PLUSW2
WDTCON
OSCCON
LVDCON
ADRESH
ADCON0
ADCON1
ADCON2
ADRESL
INDF2
STATUS
TMR0H
T0CON
TMR1H
T1CON
FSR2H
TMR0L
TMR1L
FSR2L
RCON
Name
—
—
—
—
—
—
—
—
—
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
(1)
(1)
(1)
Address
Registers related to the operation of a peripheral feature
The SFRs can be classified into two sets: those
associated with the “core” device functionality (ALU,
Resets and interrupts) and those related to the
peripheral functions. The Reset and Interrupt registers
are described in their respective chapters, while the
ALU’s STATUS register is described later in this section.
are described in the chapter for that peripheral.
The SFRs are typically distributed among the
peripherals whose functions they control. Unused SFR
locations are unimplemented and read as ‘0’s.
FBDh
FBCh
FBFh
FBEh
FBBh
FBAh
FAEh
FADh
FACh
FABh
FAAh
FB9h
FB8h
FB7h
FB6h
FB5h
FB4h
FB3h
FB2h
FB1h
FB0h
FAFh
FA9h
FA8h
FA7h
FA6h
FA5h
FA4h
FA3h
FA2h
FA1h
FA0h
BAUDCON
EECON2
CVRCON
SPBRGH
EECON1
EEDATA
CMCON
RCREG
SPBRG
TXREG
EEADR
RCSTA
TXSTA
Name
IPR3
PIR3
IPR2
PIR2
PIE3
PIE2
—
—
—
—
—
—
—
—
—
—
—
—
—
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
© 2007 Microchip Technology Inc.
Address
F8Ch
F9Eh
F9Dh
F9Ch
F9Bh
F9Ah
F8Eh
F8Dh
F8Bh
F8Ah
F9Fh
F8Fh
F99h
F98h
F97h
F96h
F95h
F94h
F93h
F92h
F91h
F90h
F89h
F88h
F87h
F86h
F85h
F84h
F83h
F82h
F81h
F80h
FLTCONFIG
SEVTCMPH
SEVTCMPL
PWMCON0
PWMCON1
OVDCOND
OVDCONS
OSCTUNE
PTCON0
PTCON1
PTPERH
PTPERL
DTCON
PTMRH
PORTB
PTMRL
PDC0H
PDC1H
PDC2H
PORTA
PDC0L
PDC1L
PDC2L
TRISB
TRISA
Name
LATB
LATA
IPR1
PIR1
PIE1
—
—
(2)
(2)
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