PIC16F876AT-I/SO Microchip Technology, PIC16F876AT-I/SO Datasheet - Page 2
![IC MCU CMOS 20MHZ 8K FLSH 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16F876AT-I/SO
Manufacturer Part Number
PIC16F876AT-I/SO
Description
IC MCU CMOS 20MHZ 8K FLSH 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F876AT-I/SO
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16F
No. Of I/o's
22
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIC16F87XA
2. Module: Flash Program Memory
EXAMPLE 1:
DS80128F-page 2
BCF
NOP
BSF
NOP
NOP
NOP
NOP
NOP
NOP
BSF
To ensure proper reading of data from tables in
Flash
Section 3.5 of the Device Data Sheet, the following
work around is necessary.
INTCON, GIE
EECON1, RD
INTCON, GIE
Program
Memory,
;Disable the interrupts
;This NOP is required for the workaround.
;This initiates program memory read.
;Any instructions here are ignored while program memory is read in the
;second instruction cycle after BSF EECON1, RD.
;These four NOP's are required for the workaround.
;Enable the interrupts
as
described
in
Work around
A software workaround will enable Flash program
memory to function as published. One NOP should
precede and six NOPs should follow the instruction
that sets the read bit.
Replace the required 3-instruction sequence,
shown in Example 3-3 of the Data Sheet, with the
sequence shown in Example 1 (below). The
interrupts should be disabled during this process.
This problem is specific to Rev. B0 and has been
resolved by Rev. B2 of the silicon (date codes later
than 0242xxx).
2003 Microchip Technology Inc.